Philips LPC2101 User Manual page 25

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Philips Semiconductors
Volume 1
Table 15:
Generic
name
PLLCON
PLLCFG
PLLSTAT
PLLFEED
[1]
User manual
PLL registers
Description
PLL Control Register. Holding register for
updating PLL control bits. Values written to this
register do not take effect until a valid PLL feed
sequence has taken place.
PLL Configuration Register. Holding register
for updating PLL configuration values. Values
written to this register do not take effect until a
valid PLL feed sequence has taken place.
PLL Status Register. Read-back register for
PLL control and configuration information. If
PLLCON or PLLCFG have been written to, but
a PLL feed sequence has not yet occurred,
they will not reflect the current PLL state.
Reading this register provides the actual
values controlling the PLL, as well as the
status of the PLL.
PLL Feed Register. This register enables
loading of the PLL control and configuration
information from the PLLCON and PLLCFG
registers into the shadow registers that
actually affect PLL operation.
Reset value reflects the data stored in used bits only. It does not include reserved bits content.
Rev. 01 — 12 January 2006
UM10161
Chapter 3: System control block
Access Reset
Address
[1]
value
R/W
0
0xE01F C080
R/W
0
0xE01F C084
RO
0
0xE01F C088
WO
NA
0xE01F C08C
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
25

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