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Philips Semiconductors
Volume 1
The auto-RTS function is enabled by setting the CTSen bit. Auto-RTS data flow control
originates in the U1RBR module and is linked to the programmed receiver FIFO trigger
level. If auto-RTS is enabled, and if the receiver FIFO level reaches the programmed
trigger level, RTS1 is deasserted (to a HIGH value). The sending UART may send an
additional byte after the trigger level is reached (assuming the sending UART has another
byte to send) because it may not recognize the deassertion of RTS1 until after it has
begun sending the additional byte. RTS1 is automatically reasserted (to a LOW value)
once the receiver FIFO has reached the previous trigger level. The reassertion of RTS1
signals the sending UART to continue transmitting data.
If auto-RTS mode is disabled, the RTSen bit controls the RTS1 output of the UART1. If
auto-RTS mode is enabled, hardware controls the RTS1 output, and the actual value of
RTS1 will be copied in the RTSen bit of the UART1. As long as auto-RTS is enabled, the
value if the RTSen bit is read-only for software.
Example: Suppose the UART1 operating in type 550 has trigger level in U1FCR set to 0x2
then, if auto-RTS is enabled, the UART1 will deassert the RTS1 output as soon as the
receive FIFO contains 8 bytes (see Table 108 on page 108). The RTS1 output will be
reasserted as soon as the receive FIFO hits the previous trigger level: 4 bytes.
UART1 Rx
start
byte N
RTS1 pin
UART1 Rx
FIFO read
UART1 Rx
N-1
FIFO level
Fig 19. Auto-RTS functional timing
Auto-CTS
The auto-CTS function is enabled by setting the CTSen bit. If auto-CTS is enabled the
transmitter circuitry in the U1TSR module checks CTS1 input before sending the next data
byte. When CTS1 is active (LOW), the transmitter sends the next byte. To stop the
transmitter from sending the following byte, CTS1 must be released before the middle of
the last stop bit that is currently being sent. In auto-CTS mode a change of the CTS1
signal does not trigger a modem status interrupt unless the CTS Interrupt Enable bit is set,
Delta CTS bit in the U1MSR will be set though.
generating a Modem Status interrupt.
Table 111: Modem status interrupt generation
Enable Modem
CTSen
Status
(U1MCR[7])
Interrupt
(U1IER[3])
0
x
1
0
1
0

User manual

stop
start
bits0..7
stop
N
N-1
N-2
CTS Interrupt
Delta CTS
Enable
(U1MSR[0])
(U1IER[7])
x
x
x
0
x
1
Rev. 01 — 12 January 2006
N-1
N-2
M+2
Table 111
Delta DCD or
Trailing Edge RI or
Delta DSR
(U1MSR[3] or U1MSR[2] or (U1MSR[1]))
x
0
x
UM10161
Chapter 10: UART1
start
bits0..7
M+1
M
M-1
lists the conditions for
Modem Status
Interrupt
no
no
yes
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
stop
110

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