Renesas REJ06B0732-0100 Application Note page 2

Data transfer between on-chip ram areas with dmac (cycle-stealing mode)

Introduction

1.1

Specification

• DMAC channel 0 is used.

• Auto-request mode is used as the interrupt source for activating DMA transfer.

• Cycle-stealing mode is used as the bus mode.

1.2

Used Module

• Direct memory access controller (DMAC channel 0)

1.3

Applicable Conditions

• Microcontroller:

• Operating Frequency:

• C Compiler:

REJ06B0732-0100/Rev.1.00

Data Transfer between On-chip RAM Areas with DMAC (Cycle-Stealing Mode)

SH7211

Internal clock

160 MHz

Bus clock

40 MHz

Peripheral clock

40 MHz

SuperH RISC engine family C/C++ compiler package Ver.9.01,

from Renesas Technology

March 2008

SH7211 Group

Page 2 of 13

Sh7211