Table of Contents
Advertisement
FIGURE 9.2
ALGORITHM DRIVEN SEEK
refer to Application
I~
Note ST001
-----I
u
u
----.1
1.....-
2 usec Min.
10 usec Max.
In order to better utilize the stepper motor's speed characteristics, the con-
troller can issue step pulses at a rate faster than 3ms. This algorithm
accelerates the motor to its maximum speed, steps it slightly less than the
desired distance, and then decelerates it prior to arriving at the specified track.
Employing this algorithm allows access time to be reduced considerably while
maintaining a 15ms settling time. For more information consult Seagate
Technology Application Note - ST001
4.1.6 DRIVE SELECT 1-4 (see figure 14.0)
DRIVE SELECT, when a low level, connects the drive interface
to the control lines. Cutting the appropriate shunts at IC posi-
tion 68 will determine which select line on the interface will
activate that drive. The following table indicates which DRIVE
SELECT shunts must be cut.
DRIVE SELECT
OS 1
OS 2
OS
3
OS 4
4.2 Control Output Lines
CUT SHUNTS
10-7,11-6, and 12-5
9-8,11-6, and 12-5
9-8,10-7, and 12-5
9-8,10-7, and 11-6
The output control signals are driven with an open collector output
stage capable of sinking a maximum of 48mA at low level or true
state with maximum voltage of 0.4V measured at the driver. When the
line driver is in the high level or false state, the driver transistor is off
and the collector leakage current is a maximum of 250uA. Figure 8.0
shows the recommended circuit
All J1 output lines are enabled by the DRIVE SELECT line.
-17-
Advertisement
Table of Contents
