STMicroelectronics STLUX385A User Manual page 9

UM1753
Header
CLK_GetITStatus
CLK_ClearITPendingBit
CLK_PLLConfig
CLK_PLLCmd
CLK_CCOConfig
CLK_ADCConfig
CLK_AWUConfig
CLK_SMEDConfig
Table 2. STLUX385A clock (continued)
Input parameters
CLK_IT specifies the CLK
interrupt.
CLK_IT specifies the CLK
interrupt.
CLK_PLL_Source specifies the
clock source for the PLL. It can
be HSI or HSE.
CLK_PLL_DIVPRES is the
division factor for PLL selected
clock.
NewState can be ENABLE or
DISABLE.
CLK_CCO specifies the clock
source for the CCO. It can be
one of the following sources:
HIS, LSI, HSE, PLL, CPU,
CKM, SMEDx, ADC, EEPROM,
AWU, prescaled PLL.
CLK_CCODIVR is the division
factor n for the CCO clock,
CLKCCO = CLK / (n + 1).
CLK_ADC_Source specifies
the clock source for the ADC. It
can be one of the following
peripherals: HSI, PLL, LSI,
HSE.
CLK_ADC_DIV is the division
factor for PLL selected clock.
CLKADC = CLKSEL / (n+1).
CLK_AWU_DIVIDER is the
division factor for the AWU
clock. It can be a power of two
ranging from 1 to 256.
CLK_SMD selects the SMEDx
clock to be configured.
Source specifies the clock
source for the SMEDx. It can be
one of the following peripherals:
HSI, PLL, LSI, HSE.
Prescaler is the division factor
for the SMEDx clock. It can be
a power of two ranging from
1 to 128.
DocID026248 Rev 1
Output
parameters
ITStatus is the Checks whether the
current status specified CLK interrupt has
for the interrupt. is enabled or not.
Clears the CLK's interrupt
This function sets the clock
This function enables or
This function sets the clock
source for the CCO clock.
This function sets the clock
source for the ADC.
This function configures the
This function configures the
STLUX library
Functionality
pending bits.
source for PLL.
disables PLL.
AWU clock.
SMEDS clock.
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