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VersaKit-30xx
2.4.1
Probe headers for peripheral and I/O access around the VRS51L3074 QFP-64
The following figure shows the pin connections of the header footprints located around VRS51L3074-40-Q on the
development board:
2.4.2
Header footprints for VRS51L3074 QFP-64 peripherals and I/O access
To access the VRS51L3074 I/Os and peripherals, the devboard provides a 64-pin header footprint near the prototyping
area. This header footprint provides access to all pins on the chip. The diagram below shows the header footprint pin-out.
H17 – VRS51L3074 QFP-64 Peripheral and I/O Access
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www.ramtron.com
Figure 7: Probing vias around the VRS51L3074
2
4
6
8
10
12
14
16
18
20
22
24
1
3
5
7
9
11
13
15
17
19
21
23
Figure 8: Pin description of H17 I/O and peripheral access
40
26
28
30
32
34
36
38
42
44
46
48
25
27
29
31
33
37
39
41
43
45
47
35
60
50
52
54
56
58
62
64
49
51
53
55
57
59
61
63
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