Pc/104 format i/o module with 8 analog inputs, 1 analog output, 24 digital i/o
lines, 3 16-bit counter/timers (dx version), 1 interrupt line (43 pages)
Summary of Contents for Diamond Systems DMM-16R-AT
PC/104-Plus PCI interface support (model DMM-16RP-AT only) NOTE: For simplicity, in this manual the term “DMM-16R-AT” may be used to refer to both the PC/104 and the PC/104-Plus models of the board. In instances where the information is specific to one model, the text will say “DMM-16R-AT only”...
Analog ground, to be used as a reference for all analog input and output channels; All Agnd pins are tied together on the board. Dgnd Digital ground, to be used as a reference for all digital I/O and counter/timer signals www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 6...
4. BOARD CONFIGURATION Refer to the Drawing of DMM-16R-AT on Page 5 for locations of the configuration items mentioned here. 4.1 I/O Base Address (ISA bus only) Each board in the system must have a different base address. In ISA bus mode, the board’s base address is set with a portion of jumper block J6, located at the lower left corner of the board.
Page 8
The downside of differential inputs is that only half as many are available, since two input pins are required to produce a single differential input. DMM-16R-AT can be configured for either 16 single-ended inputs or 8 differential inputs.
Page 9
DMM-16R-AT allows you to select from levels 15, 14, 12, 11, 10, 9, 7, 6, 5, 4, and 3. Only one IRQ level is used by DMM-16R-AT. To select the desired IRQ level install a jumper in that number’s location in the Interrupt area of jumper block J6.
5. I/O REGISTER MAP 5.1 Overview DMM-16R-AT occupies 16 bytes in I/O space. For ISA bus operation, these registers are located in the ISA bus I/O address space. For PCI bus operation, these registers are located in the BAR0 configured during system boot.
Page 11
ADBU See next page See next page See next page See next page * Registers 10 and 11 are the same for pages 0 and 1 but different for page 2. See below. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 11...
Page 12
Page 1 Page 1 is used to manage the autocalibration features. WRITE operations: Bit no. EE_EN EE_RW RUNCAL CMUXEN TDACEN EEPROM access code READ operations: Bit No. TDBUSY EEBUSY CMUXEN TDACEN FPGA ID www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 12...
Page 13
Registers 10 and 11 are the same in write mode for all pages, but they are different in read mode for page 2. Therefore they are included in the Read operation table below. WRITE operations: Bit no. DIRB DIRA READ operations: Bit no. DIRB DIRA www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 13...
FIFO properly so that appropriate pairs of bytes are read out together. Base + 1 Write D/A LSB Bit No. Name Definitions: DA7-0 D/A bits 7-0; DA0 is the LSB. D/A data is an unsigned 12-bit number ranging from 0 to 4095. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 14...
Page 15
DIOB0 When DMM-16R-AT is configured for Legacy DIO mode, port B is fixed as output, and this register is used to write data to it. Port B is on I/O connector J3 pins 41-48. In Enhanced mode, this register is not used.
Page 16
Register 6 reads back the FPGA minor ID for this design, 0x01. Register 5 reads back the FPGA revision. This starts with 0x01 and increments with each successive version of the FPGA. Registers 4 reads back as 0x00 always. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 16...
Page 17
ADCH3 - 0 Current A/D channel; this is the channel currently selected on board and is the channel that will be used for the next A/D conversion (unless a new value is written to the channel register before then). www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 17...
Page 18
PB7-0 are set to output. P_DIRA = 0 and P_DIRB= 1. Enhanced Mode: The direction of PA7-0 and PB7-0, and pins P_DIRA and P_DIRB, are determined by register bits DIRA and DIRB www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 18...
Page 19
DI0 is low, the counters are stopped. In this way pin 48 can be used as an A/D conversion gate signal when the counters are used for A/D conversion timing. Counters 1 and 2 run freely with no gating. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 19...
Page 20
FIFO half full flag; 0 = FIFO is less than half full; 1 = FIFO is at least half full FIFO empty flag; 0 = FIFO is not empty; 1 = FIFO is empty Additional FIFO flags OF (overflow) and UF (underflow are accessible in page 2. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 20...
Page 21
Bit No. Name RANGE ADBU This address provides a means of reading back the values written to the registers at Base + 10 (C2, C1, C0) and Base + 11 (RANGE, ADBU, G1, G0). www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 21...
Page 22
Select Counter 1 - 0 Select Counter 0 Select Counter 1 Select Counter 2 Read Back command RW1-0 Read/ Write Counter Latch command Read/ Write LSB only Read/ Write MSB only Read/ Write LSB first, then MSB www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 22...
Page 23
EEPROM / TrimDAC address. The EEPROM recognizes address 0 – 127 using address bits A6 A7-A0 – A0. The TrimDAC only recognizes addresses 0 – 7 using bits A2 – A0. In each case remaining address bits will be ignored. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 23...
Page 24
Base + 15 Read FPGA Revision Code This register may be read back to indicate the revision level of the FPGA design. This value matches the original DMM-16-AT value to ensure backward compatibility. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 24...
Page 25
When reading these two registers, the value of the corresponding FPGA pins is always returned. In input mode, the pins are driven by the I/O connector. In output mode, the pins are driven by the values in these registers. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 25...
Page 26
When DIO Enhanced mode is selected, this register is used to set the direction for DIO ports A and B. On power-up or reset, the board will automatically configure port A for input and port B for output. The application software can then changes the settings as needed. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 26...
7. ANALOG INPUT CIRCUIT DESCRIPTION 7.1 Resolution DMM-16R-AT uses a 16-bit A/D converter. This means that the analog input voltage can be measured to the precision of a 16-bit binary number. The maximum value of a 16-bit binary number is 2 - 1, or 65535, so the full range of numerical values provided by a 16-bit A/D converter is 0 - 65535.
Monitor the WAIT bit at Base + 10 bit 7. When it is 1 the circuit is actively settling on the input signal. When it is 0 the board is ready to perform A/D conversions. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 28...
Page 29
Note: The data range always includes both positive and negative values, even if the board is set to a unipolar input range. The data must now be converted to volts or other engineering units by using a conversion formula as shown on the next page. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 29...
A/D interrupt occurs after the scan is complete AND HF is high (i.e. an integral no. of scans has occurred and the FIFO is half full or more). The interrupt routine reads out enough complete scans to equal 256 or more samples each time it runs. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 31...
10. ANALOG OUTPUT CIRCUIT DESCRIPTION 10.1 Description DMM-16R-AT uses a 4-channel 12-bit D/A converter (DAC) to provide 4 optional analog outputs. Model DMM-16-NA-AT does not include the analog outputs. A 12-bit DAC can generate output voltages with the precision of a 12-bit binary number. The maximum value...
Page 33
Output voltage symbolic formula Output voltage for 5V range -5.0000V + 1 LSB -4.9976V … … … 2047 -1 LSB -0.0024V 2048 0.0000V 2049 +1 LSB 0.0024V … … … 4095 - 1 LSB 4.9976V www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 33...
DACs and then perform a single read operation from any of the four addresses to update all of them at once. Any DAC that has not had new data loaded into it will maintain its current value. www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 34...
12. AUTOCALIBRATION OPERATION DMM-16R-AT includes a sophisticated auto calibration circuit that manages the calibration of both the A/D and the D/A circuitry. Operation is as follows. 12.1 Reference Voltages The board contains a precision reference voltage chip that is selected for high stability over time and temperature.
13. DIGITAL I/O OPERATION DMM-16R-AT contains two 8-bit digital I/O ports accessed on the I/O connector J3. The direction of both ports is programmable. Both ports will power up and reset with their output registers set to 0. For backwards compatibility with DMM-16-AT, on power up or reset the board configures port A for input and port B for output.
14. USER LED OPERATION DMM-16R-AT provides a blue LED that is user programmable. This LED is typically used to verify that the board is properly configured and responding to software control. The board powers up and resets with the LED turned on.
On DMM-16R-AT counter 0 is made fully available to the user. The input is on pin 29 of the I/O connector (IN0-). A rising edge on the input will cause the counter to decrement. The gate is on pin 46 of the I/O connector (DIO A2 / GATE0).
10mA max with DACs unloaded; not short-circuit protected +5V output current Limited by PC/104 power supply; not short-circuit protected Operating temperature -40 to +85 Operating humidity 5% to 95% noncondensing Weight DMM-16R-AT: 64g / 2.25oz; DMM-16RP-AT: 80g / 2.84oz www.diamondsystems.com DMM-16R-AT User Manual V1.31 Page 39...
Need help?
Do you have a question about the DMM-16R-AT and is the answer not in the manual?
Questions and answers