Philips DVDR880/001 Service Manual page 72

EN 74 5. DVDR880-890 /0X1
Error Codes Nucleus 805
Error Code Description
0x00 No Error
0x11 No link register access
0x12 No link register access or link reset failed
0x13 No link register access or link reset failed
0x14 No link register access
0x15 No link register access
0x16 No link register access
0x17 Link reset failed
0x18 Link reset failed
0x19 Cycle timer in link chip does not increment
0x1A Interrupt from Link chip does not go low at 8051
0x1B Interrupt from Link chip does not go high at 8051
0x1C Submission of read request to Phy timed out
0x1D Reception of read data from Phy timed out
0x1E Inproper Phy read address was received from Phy Bus_LP
0x1F Phy write timed out
0x20 Could not read reg #2 of Phy
0x21 Could not write 0xaa to reg #1 of phy
0x22 Could not write 0x55 to reg #1 of phy
0x23 Read incorrect default gapcount from Phy
0x24 Read incorrect updated gapcount from Phy
0x25 Read incorrect gapcount from Phy after reset
0x26 Expecting no 1394 connectivity; while Phy.CNA
indicates connection
0x27 Expecting 1394 connectivity; while Phy.CNA
indicates no connection
0x28 Expected port1 unconnected; but found connected Bus_PC
0x29 Phy read retry limit exceeded
0x2A Expected port2 unconnected; but found connected -
0x2B Expected port3 unconnected; but found connected -
0x2C Expected 0x1 in lower nibble of Phy reg 7
0x2D Expected CPS and C bit set in Phy reg 6
0x30 Internal ram problem in address lines
0x31 Internal ram problem in data lines
0x32 External ram problem in address lines
0x33 External ram problem in data lines
0x34 Problem accessing flex scratch register
0x36 INT0n stuck at '0'
0x37 INT0n stuck at '1'
0x38 Problem accessing NW701 registers
0x39 Reset line to NW701 not functioning
0x3A Checksum of codespace 0x0000-0xfbff is not 0x00 Incorrectly programmed
0xF4 PHY chip not responding
0xF5 LINK chip not responding
5.5 Loop tests
The following loops can be distinguished:
• Loops performed on the digital board only
• User Dealer loops performed on the digital and analogue
board
• System loops performed via an external connection:
outputs are looped back to the inputs.
Diagnostic Software
Bus
-
PA[8:0] | PAD[7:0]
PA[8:0] | PAD[7:0] | 1394_RSTn
PA[8:0] | PAD[7:0] | 1394_RSTn
PA[8:0] | PAD[7:0]
PA[8:0] | PAD[7:0]
PA[8:0] | PAD[7:0]
1394_RSTn
1394_RSTn
-
LINK_INTn | PINT1n
LINK_INTn | PINT1n
Bus_LP
Bus_LP
Bus_LP
Bus_LP
Bus_LP
Bus_LP
Bus_LP
Bus_LP
F117 | F173
F108 | PHY_CNA | Bus_PC
F108 | PHY_CNA | Bus_PC
-
-
-
Internal in uP
Internal in uP
PA[15:0] | PAD[7:0] | PRDn | PWRn P89C51RD2/CY62256/
PAD[7:0]
PAD[7:0]
PINT0n
PINT1n
HAD[7:0]|DV_Asn/RWn/DSUn/DSLn EPF6024 / NW701
DV_RSTn
-
-
Components
-
Link | uP
Link | uP | FPGA
Link | uP | FPGA
Link | uP
Link | uP
Link | uP
Link | FPGA
Link | FPGA
Link
Link | FPGA | uP
Link | FPGA | uP
Phy
Phy
Phy
Phy
Phy
Phy
Phy
Phy
Phy
Phy | OptoPR
Phy | OptoCNA | FPGA
Phy | OptoCNA | FPGA
Phy
Phy
Phy
Phy
Phy
Phy
P89C51RD2
P89C51RD2
74HC573
P89C51RD2/CY62256/
74HC573
EPF6024
EPF6024 / P89C51RD2
EPF6024 / P89C51RD2
EPF6024 / NW701
P89C51RD2
Phy
Phy