Yamaha AD8HR Service Manual page 18

AD8HR
CS8415A-CS (X2089A00) DIR (Digital Audio Interface Receiver)
PIN
NAME I/O
NO.
1 CDOUT O
2 /CS I
3 /EMPH O
4 RXP0 I
5 RXN0 I
6 VA+
7 AGND
8 FILT O
9 /RST O
10 RMCK I/O
11 RERR O
12 RXP1 I
13 RXP2 I
14 RXP3 I
AK4101AVQ (X3813B00) DIT
PIN
NAME I/O
NO.
1 PDN I
2 MCLK I
3 SDTI1 I
4 SDTI2 I
5 SDTI3 I
6 SDTI4 I
7 V -
DD
8 V -
SS
9 BICK I/O
10 LRCK I/O
11 FS0/CSN I
12 FS1/CDTI I
13 FS2/CDTO I
14 FS3/CDTO I/O
15 C1 I
16 C2 I
17 C3 I
18 C4 I
19 ANS I
20 BLS I/O
21 CKS0 I
18
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FUNCTION
Data out (SPI)
Control port chip select (SPI)
Pre-emphasis
AES3/SPDIF receiver port
Positive analog power supply +5V
Analog ground
PLL loop filter
Reset
Input section recovered master clock
Receiver error
Additional AES3/SPDIF receiver port
FUNCTION
Power Down & Reset Pin
Master Clock Input Pin
Audio Serial Data Input 1 Pin
Audio Serial Data Input 2 Pin
Audio Serial Data Input 3 Pin
Audio Serial Data Input 4 Pin
Power supply (4.75V~5.25V)
Ground
Audio Serial Data Clock Input / Output Pin
Input / Output Channel Clock Pin
Sampling Frequency Select 0 Pin at Synchronous mode /
Host Interface Chip Select Pin at Asynchronous mode
Sampling Frequency Select 1 Pin at Synchronous mode /
Host Interface Data Input Pin at Asynchronous mode
Sampling Frequency Select 2 Pin at Synchronous mode /
Host Interface Bit Clock Input Pin at Asynchronous mode
Sampling Frequency Select 3 Pin at Synchronous mode /
Host Interface Data Output Pin at Asynchronous mode
Channel Status Bit Input Pin for Channel 1
Channel Status Bit Input Pin for Channel 2
Channel Status Bit Input Pin for Channel 3
Channel Status Bit Input Pin for Channel 4
Asynchronous / Synchronous Mode Select Pin
Block Start Input / Output Pin
Clock Mode Select 0 Pin
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PIN
NAME I/O
NO.
15 RXP4 I Additional AES3/SPDIF receiver port
16 OSCLK I/O Serial audio output bit clock
17 OLRCK I/O Serial audio output left/right clock
18 SDOUT O Serial audio output data
19 INT O Interrupt
20 U O User data
21 OMCK I System clock
22 DGND Digital ground
23 VL+ Positive logic power supply +5V
24 H//S I Hardware/software mode control
25 RXP5 I
Additional AES3/SPDIF receiver port
26 RXP6 I
27 CDIN I Serial control data in (SPI)
28 CCLK I Control port clock
PIN
NAME I/O
NO.
22 V - Ground
SS
23 CKS1 I Clock Mode Select 1 Pin
24 TXN4 O Negative Differential Output Pin for Channel 4
25 TXP4 O Positive Differential Output Pin for Channel 4
26 TXN3 O Negative Differential Output Pin for Channel 3
27 TXP3 O Positive Differential Output Pin for Channel 3
28 V - Power supply (4.75V~5.25V)
DD
29 V - Ground
SS
30 TXN2 O Negative Differential Output Pin for Channel 2
31 TXP2 O Positive Differential Output Pin for Channel 2
32 TXN1 O Negative Differential Output Pin for Channel 1
33 TXP1 O Positive Differential Output Pin for Channel 1
34 DIF0 I Audio Serial Interface Select 0 Pin
35 V - Power supply (4.75V~5.25V)
DD
36 DIF1 I Audio Serial Interface Select 1 Pin
37 DIF2 I Audio Serial Interface Select 2 Pin
38 U1 I User Data Bit Input Pin for Channel 1
39 U2 I User Data Bit Input Pin for Channel 2
40 U3 I User Data Bit Input Pin for Channel 3
41 U4 I User Data Bit Input Pin for Channel 4
42 V12 I Validity Bit Input Pin for Channel 1 & Channel 2
43 V34 I Validity Bit Input Pin for Channel 3 & Channel 4
44 TRANS I Audio Routing Mode (Transparent Mode)
Pin at Synchronous mode
MAIN: IC929
FUNCTION
MAIN: IC924, SUB: IC903
FUNCTION