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I IC DATA
IC21
: TC94A54 (MAIN P.C.B)
DSP
* No replacement part available.
25
24
23
22
21
20
19
18
17
16
15
CLOCK
DVSS3
26
GEN
RO
27
SUBCODE
DEMOCULA
DVDD3
28
TION
ANA
1-bit
CDRCUIT
LPF
DAC
DVR
29
LO
30
DVSS3
31
VSS3
32
VDD3
33
VDDM
34
VSS1S
35
BUS0
36
BUS1
37
CPU
ADRRESS CIRCUIT
BUS2
I/F
38
BUS3
39
BUCK
40
16k
/CCE
41
RAM
/RST
42
PULL-UP
STBY
43
VDDT
44
FGIN
45
IO0
46
IO1
47
TESTD
48
VSSP
49
VCOI
DIGITAL
AUDIO
50
OUT
OUT
51
52
53
54
55
56
57
58
59
60
61
14
13
12
11
10
9
8
7
6
5
4
3
2
1
FTE
100
10-bit
5-bit
PWM
TNI
R-2R DAC
SAR ADC
99
TE
TPI
98
97
FPI1
FPI2
96
FE
PNI1
95
SERVO
PNI2
94
CONTROL
93
RVSS3
MDI
92
APC
ROM
DIGITAL EQ
LDO
91
AUTO ADJ
RAN
RVDD3
RF
90
BLOCK
89
PNSEL
88
RF
RFO
87
CAV SERVO
CLV SERVO
86
RFDC
85
AGC
84
83
SYNC SIGNAL PROTECTION
82
EFM DEMODULATION
81
VRO
80
79
RFEQ
78
RFRP
77
EFM SLICE
PLL
76
AWRC
VCO
TMAX
62
63
64
65
66
67
68
69
70
71
72
73
74
75
Pin No.
Pin name
I/O
1
RFZI
I
Input pin for the RF ripple zero-cross signal.
3AI/F
2
AVSS3
–
Grounding pin for 3.3V analog circuits.
3
RFRP
O
RF ripple signal output pin.
3AI/F
4
FEI
O
Focus error signal input pin.
3AI/F
5
SBAD/RFDC
O
Subbeam addition signal input pin.
3AI/F
6
TEI
O
Tracking error signal input pin.
3AI/F
7
TEZI
I
Input pin for tracking error signal zero-cross.
3AI/F
8
AVDD3
–
Supply voltage pin for 3.3V analog circuit.
9
FOO
O
Forcus equalizer output pin.
3AI/F
10
TRO
O
Tracking equalizer output pin.
3AI/F
11
VREF
O
Analog reference supply voltage pin.
3AI/F
12
FMO
O
Speed error/feed equalizer output pin.
3AI/F
13
DMO
O
Disc equalizer output pin.
3AI/F
14
SBSY
O
Pin for outputting the subcode block sync signal. It is "H" at
(SPCK)
3I/F
position S1 when the subcode sync signal is detected.
(CD Processor Status Read Clock (176.4 kHz) output)
15
SBOK
O
Pin for outputting the CRCC check result of a subcode Q data
(FOK)
3I/F
check. It is "H" when the check result is OK.
(CLCK)
(Focus OK signal)
(MBOV)
(Input/output pin for the clock used in reading the subcode P
to W data.)
(CD Buffer memory overflow output)
16
IPF
O
Correction flag output pin.
(SPDA)
3I/F
"H" if the AOUT pin outputs an uncorrectable symbol in C2
correction.
(CD Processor Status signal output)
17
SFSY
O
Pin for outputting the playback frame sync signal.
(EMPH)
3I/F
(Emphasis fiag output pin. ENPH on: "H". EMPH off: "L". The
(LOCK)
output polarity can be switched, using a command.)
(MONIT)
(LOCk signal)
(Pin for monitoring signals in the DSP.)
18
ZDET
O
Output pin for zero detection flag for the 1-bit DAC.
(DATA)
3I/F
(Pin for outputting subcode P to W data)
(COFS)
(Error Correstion Frame Clock 7.35 kHz output)
19
GPIN
I/O
General-purpose I/O (DSP)
3I/F
20
VSS1
–
1.5V grounding pin dedicated to the Digital circuit.
21
VDD1
–
1.5V supply voltage pin dedicated to the Digital circuit.
22
XVSS3
–
Grounding pin for the system clock oscillation circuit.
23
XI
I
Input pin for the system clock oscillation circuit.
3AI/F
24
XO
O
Output pin for the system clock oscillation circuit.
3AI/F
25
XVDD3
–
3.3V supply voltage pin for the system clock oscillation circuit.
26
DVSS3
–
Grounding pin for the 1-bit DAC.
27
RO
O
Output pin for normal R-channel data for the 1-bit DAC.
3AI/F
28
DVDD3
–
3.3V supply voltage pin for the 1-bit DAC.
29
DVR
O
Reference voltage pin for the 1-bit DAC.
30
LO
O
Output pin for normal L-channel data for the 1-bit DAC.
3AI/F
31
DVSS3
–
Grounding pin for the 1-bit DAC.
32
VSS3
–
3.3V grounding pin dedicated to the I/F circuit
33
VDD3
–
3.3V supply voltage pin dedicated to the I/F circuit.
CDX-E410
Description
Remark
To be connected to the RFRP via
0.033 uF.
–
–
Monitor pin for various signals.
To be connected to the TEI via
0.033 uF.
–
–
–
Connected to the VRO and
PVREF within the IC.
To be connected 0.1 uF.
PWM ternary output (AVDD3,
GND, and VREF).
"H" at S1 when Subcode Sync is
detected.
–
–
7.35kHz (At this pin, flags in the
DSP and PLL-circuit clock can be
monitored, using microcontroller
commands. The pin also outputs
text data serially.)
Valid also for 1-bit DAC external
inputs.
General-purpose I/O (input after a
reset).
–
–
–
–
Input to the internal MCK.
–
–
No capacitor is required at the
DVR pin unless the built-in 1-bit
DAC is used.
3.3V must be applied across the
DVDD3 and DVSS3 pins, how-
ever.
–
–
–
9
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