Memory Subsystem; Memory Placement Rules - IBM p5 550 Technical Overview And Introduction

pmcycles -m
Note: The pmcycles command is part of the bos.pmapi fileset. First check whether that
component is installed using the lslpp -l bos.pmapi command.

2.3 Memory subsystem

The p5-550 system offers pluggable DIMMs for memory. Each processor card contains eight
slots for up to eight pluggable DIMMs. The minimum memory for a p5-550 processor-based
system is 1 GB and 64 GB as a maximum installable memory option. The p5-550 memory
capacity is dependant on the number of processors ordered for the system and on the type of
memory and functionality required. Figure 2-6 shows the offerings and memory slot
availability.

2.3.1 Memory placement rules

The memory features available at the time of writing for the p5-550 are listed in 1.3.2,
"Memory features" on page 7.
Each memory feature consists of four DIMMs, or quad, and must be installed according to
Figure 2-6. The first quad slots are J0A, J1A, J0C, and J1C, and for the second quad, the
slots are J0B, J1B, J0D, and J1D.
Note: A quad must consist of a single feature (that is made of four identical DIMMs). Mixed
DIMM capacities in a quad will result in reduced RAS.
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p5-550 Technical Overview and Introduction
similar to the following (False, as used in this output, signifies that the
value cannot be changed through an AIX command interface):
type powerPC_POWER5
frequency 165600000
smt_enabled true
smt_threads 2
state enable
This command (in AIX 5L) uses the performance monitor cycle
counter and the processor real-time clock to measure the actual
processor clock speed in MHz. The following is the output of a 2-way
p5-550 running at 1.65 GHz system with SMT enabled:
Cpu 0 runs at 1656 MHz
Cpu 1 runs at 1656 MHz
Cpu 2 runs at 1656 MHz
Cpu 3 runs at 1656 MHz
Processor type False
Processor Speed False
Processor SMT enabled False
Processor SMT threads False
Processor state False