LG TCH-800 Service Manual page 23

PIN DESCRIPTION
Pin No. Symbol I/O
70 LOCK O
71 PBFR O
72 SMEF O
73 SMON O
74 DVDD2 -
75 SMDP O
76 SMSD O
77 BCKI I
78 TESTV I
79 DSPEED I
80 LRCHI I
BLOCK DIAGRAM
Output signal of LKFS condition sampled PBFR/16(if LKFS is "H", LOCK is "H", if
LKFS is sampled "L" at least 8 times by PBFR/16, LOCK is "L")
Write frame clock(Lock:7.35KHz)
LPF time constant control of the spindle servo error signal
ON/OFF control signal for spindle servo
Digital VDD2
Spindle Motor drive(Rough control in the SPEED mode, Phase control in the
PHASE mode)
Spindle Motor drive(Velocity control in the PHASE mode)
Audio data bit clock input of 48 bit/Slot(2.1168MHz)
TEST input terminal (GND connection)
TEST input terminal(VDD connection)
Channel clock input of 48 bit/Slot(44.1KHz)
Description
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