LG TCH-800 Service Manual page 21

PIN DESCRIPTION
Pin No. Symbol I/O
1 AVDD1 -
2 DPDO O
3 DPFIN I
4 DPFOUT O
5 CNTUOL I
6 AVSS1 -
7 DATX O
8 XIN I
9 XOUT O
10 WDCHO O
11 LRCHO O
12 ADATAO O
13 DVSS1 -
14 BCKO O
15 C2PO O
16 VREFL2 I
17 VREFL1 I
18 AVDD2 -
19 RCHOUT O
20 LCHOUT O
21 AVSS2 -
22 VREFH1 I
23 VREFH2 I
24 EMPH O
25 LKFS I
26 S0S1 O
27 RESET I
28 ESP I
29 SQCK I
30 SQDT O
31 SQOT O
32 SBCK I
33 SDAT O
34 DVDD1 -
35 MUTE I
Analog VCC1
Charge pump output for Digital PLL
Filter input for Digital PLL
Filter output for Digital PLL
VCO control voltage for Digtial PLL
Analog Ground1
Digital Audio output data
X'tal oscillator input
X'tal oscillator output
Word clock output of 48 bit/Slot(88.2KHz)
Channel clock output of 48 bit/Slot (44.1KHz), 88.2KHz when ESP ON
Serial audio data output of 48 bit/Slot(MSB first), double speed output when ESP ON
Digital Ground1
Audio data bit clock output of 48 bit/Slot (2.1168MHz), 4.2336MHz when ESP ON
C2 Pointer for output audio data
Input terminal2 of reference voltage "L" (Floating)
Input terminal1 of reference voltage "L" (GND connection)
Analog VCC2
Right-Channel audio output through D/A converter
Left-Channel audio output through D/A converter
Analog ground2
Input terminal1 of reference voltage "H" (VDD connection)
Input terminal2 of reference voltage "H" (Floating)
Emphasis/Non-Emphasis output, H:Emphasis ON, L:Emphasis OFF
The Lock status output of frame sync.
Output of subcode sync signal(S0+S1)
System reset at "L"
ESP function ON/OFF control ("L":ESP function ON, "H":ESP function OFF)
Clock for output Subcode-Q data
Serial output Subcode-Q data
The CRC (Cycle Redundancy Check) check result signal output of Subcode-Q
Clock for output subcode data
Subcode serial data output
Digital VDD1
Mute control input("H":Mute ON)
Description
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