LG TCH-800 Service Manual page 22

PIN DESCRIPTION (continued)
Pin No. Symbol I/O
36 MLT I
37 MDAT I
38 MCK I
39 DB8 I/O
40 DB7 I/O
41 DB6 I/O
42 DB5 I/O
43 DB4 I/O
44 DB3 I/O
45 DB2 I/O
46 DB1 I/O
47 C1F1 I/O
48 C1F2 I/O
49 C2F1 I/O
50 C2F2 I/O
51 C2FL I/O
52 /PBCK I/O
53 DVSS2 I/O
54 FSDW I/O
55 ULKFS I/O
56 /JIT I/O
57 C4M I/O
58 C16M I/O
59 /WE I/O
60 /CS I/O
61 XTALSEL I
62 TEST0 I
63 CDROM I
64 SRAM I
65 TEST1 I
66 EFMI I
67 ADATAI I
68 /ISTAT O
69 TRCNT I
Latch Signal input from Micom(Schmit Trigger)
Serial data input from Micom(Schmit Trigger)
Serial clock input from Micom(Schmit Trigger)
SRAM data I/O port8(MSB)
SRAM data I/O port7
SRAM data I/O port6
SRAM data I/O port5
SRAM data I/O port4
SRAM data I/O port3
SRAM data I/O port2
SRAM data I/O port1(LSB)
Monitoring output for C1 error correction(RA1)
Monitoring output for C1 error correction(RA2)
Monitoring output for C2 error correction(RA3)
Monitoring output for C2 error correction(RA4)
C2 decoder flag(RA5, "H":When the processing C2 code is impossible correction status)
Output of VCO/2 (4.3218MHz) (RA6)
Digital ground 2
Window or unprotected frame sync(RA7)
Frame sync protection state(RA8)
Display of either RAM overflow or underflow for ± 4 frame jitter margin(RA9)
Only monitoring signal(4.2336MHz) (RA10)
16.9344MHz signal output (RA11)
Terminal for test
Terminal for test
Mode Selection 1(H:33.8688MHz, L:16.9344MHz)
TEST input terminal(GND connection)
Mode Selection2 (H:CDROM, L:CDP)
TEST input terminal(GND connection)
TEST input terminal(GND connection)
EFM signal input
Serial audio data input of 48 bit/Slot(MSB first)
The internal status output
Tracking counter input signal
Description
- 2-18 -