ELECTRICAL CHARACTERISTICS
MII-RECEIVE CLOCK TOLERANCE
RX_clk
Symbol
t1
Rx_clk Duty Cycle
t2a
Rx_clk Period (100Base-TX / MII Interface)
t2b
Rx_clk Period (10Base-T / MII Interface)
NOTES : 1.RX_clk Duty Cycle switching point is 50% if VDD
8-6
t
1
t
2
Figure 8-3. MII-Receive Clock Tolerance Timing Diagram
Table 8-8. MII-Receive Clock Tolerance
Conditions
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
Min
Typ
100M
35
60
10M
35
50
-
40
-
400
Preliminary Spec. ver
1.4
Max
Unit
65
%
65
ns
-
ns
-