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User Manual VX4790A Arbitrary Waveform Generator Module 070-9152-02 This document applies for firmware version 1.00 and above. Warning The servicing instructions are for use by qualified personnel only. To avoid personal injury, do not perform any servicing unless you are qualified to do so.
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Copyright E Tektronix, Inc. 1992, 1994. All rights reserved. Tektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes that in all previously published material. Specifications and price change privileges reserved. Printed in the U.S.A.
Tektronix, with shipping charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a location within the country in which the Tektronix service center is located. Customer shall be responsible for paying all shipping charges, duties, taxes, and any other charges for products returned to any other locations.
8444 AB Heerenveen The Netherlands declare under sole responsibility that the VX4790A and all options meets the intent of Directive 89/336/EEC for Electromagnetic Compatibility. Compliance was demonstrated to the following specifications as listed in the Official Journal of the European Communities:...
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A - 43 Appendix I - VX4790A Performance Verification ........
Do Not Operate With If you suspect there is damage to this product, have it inspected by qualified Suspected Failures service personnel. Safety Terms and Symbols Terms in This Manual These terms may appear in this manual: VX4790A Arbitrary Waveform Generator Module...
Overvoltage Category Overvoltage categories are defined as follows: CAT III: Distribution level mains, fixed installation CAT II: Local level mains, appliances, portable equipment CAT I: Signal level, special equipment or parts of equipment, telecommunica- tion, electronics VX4790A Arbitrary Waveform Generator Module...
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The ARB is programmed with a haversine function with maximum value of 3.12 volts, a minimum value of 0 volts, and a frequency of 350 Hz. SHV 3.12 350<CR><LF> This example would create the same result as the previous example. 3 50 VX4790A...
GPIB controller, and software (NI-488.2M). Within the test sequences you will be instructed to issue Interface Bus Interactive Control (ibic) commands to set up the VX4790A under-test system and other associated VXIbus test instruments. Please refer to the NI-488.2M User Manual for additional VX4790A Arbitrary Waveform Generator Module A–45...
The test sequences in this procedure are valid when the following requirements are met: H The VX4790A module covers are in place and the module is installed in an approved VXIbus mainframe according to the procedures in Section 2 Preparation For Use, of the Operating Manual.
103-0030-00 female to BNC male VX4790A-Under-Test Configuration In order to perform this verification procedure, the VX4790A must be installed in an approved VXIbus system. At a minimum, the system must contain the elements listed in Table I–2. Table I–2: Elements of a Minimum VX4790A Under-Test System...
VX4521 Slot 0 13 (0d, hexadecimal) 13 VX4790A under-test VX4790 Slot 1 VX4750 VX4750 Slot 2 Test Record Photocopy the Test Record, and use it to record the performance verification results for your module. VX4790A Arbitrary Waveform Generator Module A–48...
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Appendix I: Performance Verification Table I–4: VX4790A Test Record VX4790A Serial Number: Temperature and Relative Humidity: Date of Last Calibration: Verification Performed by: Certificate Number: Date of Verification: VXIbus Interface Logical Address, IEEE Address, Slot No., MFG., Model, etc. Table Command Response 1st.
Following the VXIbus system startup sequence, the green PWR light on the VX4790A front panel indicates that the self test has passed and that the power supplies are operational. If the +5 V, ±24 V (including the derived ±17.5 V), or –5.2 V power supplies fail, or if the +5 V, ±24 V, or –5.2 V fuses open, the PWR...
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200 LA 0, IEEE 13, Slot 0, MFG FFDh, MODEL VX4521, PASS, , RM.. LA 1, IEEE 01, Slot 1, MFG FFDh, MODEL VX4790A, PASS TRIGGER;LOCK;READ STB, MESG, 0, V1.3, NORMAL PASS LA 2, IEEE 02, Slot 2, MFG FFDh, MODEL VX4750, TRIGGER;LOCK;READ STB, MESG, 0, V1.3, NORMAL...
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Check that the ERROR light is on and that the VX4521 indicates an S in the second digit of the front panel display, indicating an SRQ pending. c. Perform a Serial Poll of the VX4790A and verify that the Slot 0 SRQ is no longer asserted (Note a 48 hexadecimal response indicating that the VX4790A was the interrupting module).
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–7.010 to –6.610 VDC ibwrt "q;-10.23z;t" –10.43 to –10.03 VDC 4. Reset the VX4790A to the 5 VDC range and verify the voltages in Table I–7 to be within ±0.4% of full scale (±40 mV). VX4790A Arbitrary Waveform Generator Module...
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–3.450 to 3.370 VDC ibwrt "q;-5.11z;t" –5.150 to –5.070 VDC 5. Reset the VX4790A to the 0.1 VDC range and verify the voltages in Table I–8 to be within ±1.7% of full scale (±3.4 mV). Table I–8: 0.1 V Range Verification...
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SMB to BNC cable and the 50 W terminator. Set the oscilloscope for a 1 MW input, 2 V/div. and 200 µs/div. 2. Reset the VX4790A to its power-up state and close the ARB OUT relay. Then set up a 5 V...
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"2L" (Observe original waveform roughness) 4. Reset the VX4790A to generate a 10 kHz sine wave and verify the waveform on the oscilloscope. Then assert the 50 kHz lowpass filter and verify that the steps in the sine wave are smoothed and that the amplitude is not noticeably reduced.
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2. Connect the VX4750 FUNC OUT signal to the VX4790A AM IN using a second SMB to BNC cable. 3. Reset the VX4790A to its power-up state and close the ARB OUT relay. Set up a 10 V (20 V...
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Appendix I: Performance Verification 5. Reset the VX4790A to enable external modulation. Then set up the VX4750 to provide an initial +1.5 VDC reference. Verify that the VX4790A sine wave amplitude is 20 V ibwrt "1a" ibfind VX4750 ibwrt "Wave Sine;Freq 100;Ampl 0;Imp 10e6;Ofst 1.5"...
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SMB to BNC cable and the 50 W terminator. Set the oscilloscope for a 1 MW input, 2 V/div, and 20ns/div. 2. Reset the VX4790A first memory location to a negative 5 V level, the second location to a positive 5 V level (w designates end of waveform voltage), and enable the ARB OUT relay.
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15 MHz ibwrt "12.5e6f;t" 12.5 MHz 4. To verify the frequency division function, reset the VX4790A to a ±5 V, 25 MHz square wave. Then specify a scaling integer and verify the resulting SMP CLK* frequency as indicated in Table I–14.
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Prerequisites All prerequisites listed on page A–46 1. Connect the VX4790A ARB OUT signal to CH1 of the oscilloscope. Set the oscilloscope to a 1 MW input, 5 V/div, 500 µs/div, and CH1 trigger. 2. Connect the VX4750 FUNC OUT signal to the VX4790A EXT CLK input and also to CH2 of the oscilloscope using a BNC T, a BNC to BNC cable, and an SMB to BNC cable.
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Connect the VX4750 TRIG OUT signal to the VX4790A EXT TRIG* input with a second SMB to BNC cable. c. Reset the VX4790A to generate a ±5 V, 1 kHz square wave, to enable the external trigger, and enable the output relay.
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VX4750 ibwrt "Rst;Wave Sine;Freq 2kHz;Ampl 10Vpp;Trgi VXI 0" e. Reset the VX4790A to generate a ±5V, 1 kHz square wave, to enable the front panel EXT TRIG* input signal to be coupled to the VXIbus, TTLTRG0*, to enable the ARB OUT relay, and to assert a trigger.
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Check the additional TTLTRG* lines by repeating steps d and e, and substituting VXI # in step d and 3#x in step e where the # = 1, 2, 3, 4, 5, 6, and 7. This completes the VX4790A verification procedure. VX4790A Arbitrary Waveform Generator Module A–66...
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Warning The following servicing instructions are for use only by qualified personnel. To avoid personal injury, do not perform any servicing other than that contained in the operating instructions unless you are qualified to do so. Refer to General Safety Summary and Service Safety Summary prior to performing any service.
Appendix J: Adjustment Procedure 12345 In order to meet its published specification, the VX4790A must be adjusted every twelve months. The adjustment should be performed at the temperature at which the module will be operating. If this is not feasible, or the module will be operating over a wide temperature variation, consult the temperature drift specification in the Operating Manual.
Tektronix 73A–850 Providing adjustment access System Requirements In order to perform this procedure, the VX4790A must be installed in an approved VXIbus system. At a minimum, the system must contain the elements listed in Table J–2. Table J–2: Elements of a Minimum VX4790A Adjustment System...
If you are not using an extender card, remove the right cover of the VX4790A module before installation to allow attachment of the DVM test leads. Refer to the module cover notations for adjustment location.
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Figure 6: Adjustment Locations 1. Adjust the 3 V DAC reference voltage with the following steps: a. Attach the positive DVM lead to the VX4790A Test Point 1, located on the bottom edge of the circuit board, about 1.5 inches from the front panel (small plated through hole labeled TP1).
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3. Repeat step 2. 4. Adjust the VX4790A ARB OUT signal gain with the following steps: a. Attach the DVM to the VX4790A ARB OUT signal using the SMB to BNC cable, a 50 W feed-through terminator, and a BNC to Dual Banana adaptor.
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