Download Print this page

JVC KS-FX621 Service Manual page 27

Cassette receiver
Hide thumbs Also See for KS-FX621:

Advertisement

4.6 PT6523LQ (IC651) : LCD driver
• Pin layout
48
49
64
1
• Block diagram
• Piin function
Pin No.
Pin Name
1~ 52
SG1 ~ SG52
53~55
COM1 ~ COM3
56
VDD
57
INH
58
VDD1
59
VDD2
60
VSS
61
OSC
62
CE
63
CLK
64
DI
Note 1:
When INH = "LOW" : Serial data trensfers can be performed when the display is forcibly OFF.
~
33
32
17
~
16
COMMON
DRIVER
CLOCK
GENERATOR
ADDRESS
DETECTOR
I/O
O
Segment Output Pins
O
Common Driver Output Pins
-
Power Supply
I
Display OFF Control Input Pin
When this pin is "Low", the Display is forcibly turned OFF. (SG1 to SG52, COM1 to COM3 are
set to "LOW"). (See Note 1)
When this pin is set to "High", the Displa is ON.
I
Used for the 2/3 Bias Voltage when the Bias Voltages are provied externally. Connect to VDD2
when 1/2 Bias is used.
I
Used for 1/3 Bias Voltage when the Bias Voltages are provided externally. Connect to VDD1
when 1/2 Bias is used.
-
Ground Pin.
I/O Oscillation Input /Outout Pin
I
Chip Enable Pin
I
Synchronization Clock
I
Transfer Data Pin
SEGMENT DRIVER & LATCH
SHIFT REGISTER
Description
KS-FX621
(No.49825)1-27

Advertisement

loading