JVC TH-A75 Service Manual page 49

4.29 NC7S04P5-X (IC533) : Invereter
• Pin layout & Block diagram
Vcc
5
1
NC
4.30 NC7ST32P5-X (IC532) : 2-Input OR Gate
• Pin layout & Block diagram
Vcc
5
1
A
4.31 NC7SU04P5-X (IC522) : Invereter
• Pin layout & Block diagram
Vcc
5
1
NC
4.32 NC7SZ125P5-X (IC523) : Bus buffer gate with 3-state output
• Pin layout & Block diagram
VCC
5
1
OE
Y
4
2 3
A GND
Y
4
2 3
B GND
Y
4
2 3
A GND
Y
4
2 3
A GND
• Truth table
INPUT OUTPUT
A Y
L H
H L
H : HIGH logic level
L : LOW logic level
• Truth table
INPUTS OUTPUT
A B Y
L L L
L H H
H L H
H H H
H : HIGH logic level
L : LOW logic level
• Truth table
INPUT OUTPUT
A Y
L H
H L
H : HIGH logic level
L : LOW logic level
• Truth table
INPUTS OUTPUT
OE B Y
L H H
L L L
H X Z
X: Don't care
Z: High impedance
TH-A75
(No.22009)1-49