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TH-A75
4.1
UPD784215AGC194 (IC531) : CPU
• Pin layout
76
~
100
• Pin function
Pin No.
Symbol
1~8
-
9
VDD
10
X2
11
X1
12
VSS
13
XT2
14
XT1
15
RESET
16
-
17
INT0
18
INT1
19
DZF
20~22
-
23
AVDD
24
AV REF0
25
-
26
CS1
27
CS2
28
CS3
29
CS4
30~32
-
33
AVSS
34, 35
-
36
AV REF1
37
RX
38
TX
39
-
40
DSP_COM
41
DSP_STS
42
DSP_CLK
43
DSP_RDY
44
-
45
MIDIO_IN
46
MIDIO_OUT
47
MICK
1-16 (No.22009)
Description of major ICs
75
~
51
50
~
26
1
~
25
I/O
Function
- Not use
- +3.0V
I Main system clock input
I Main system clock input
- GND
- OPEN
I Connect to VSS
I Reset for Flash write
- Not use
I Error input0 (detect UNLOCK)
I Error input1 (detect Non Audio)
I GND
- Not use
- The same potential as VDD
- The same potential as VSS
- Not use
I Chip select input port
I Chip select input port
I Chip select input port
I Chip select input port
- Not use
- The same potential as VSS
- Not use
- The same potential as VDD
O For flash write
O For flash write
- Not use
I Command (serial 1)
O Status (Serial 1)
I Clock (Serial 1)
I Ready
- Not use
I Data in (Serial 0)
O Data out (Serial 0)
O Clock (Serial 0)
SECTION 4
Pin No.
Symbol
48
HREQ
49
SS
50,51
52
DSP_RST
53
54
DA_CS
55
56
PD/DA
57
PD
58~63
64
CODEC_D-OUT O Data out
65
CODEC_D-IN
66
CODEC_CLK
67
CODEC_CS
68
DEBUG1
69
DEBUG2
70
DEBUG3
71
GEBUG4
72
GND
73~75
76
EQ
77
CTR_TONE
78
3D
79, 80
81
VDD
82, 83
84
ANA/T.TUNE
85
LFE.MIX
86
LEF_OUT
87
88
S.MUTE
89~93
94
TEST
95~100
I/O
Function
I HREQ
O Slave select
-
- Not use
O DSP RESET
-
- Not use
O Chip select output
-
- Not use
O Power down output (RESET)
O Power down output (RESET)
-
- Not use
I Data in
O Clock
O Chip select output
O Debug out port
O Debug out port
O Debug out port
O Debug out port
- GND
-
- Not use
O EQ
O Center tone
O 3D-Phonic
-
- Not use
- +3.0V
-
- Not use
O ANALOG./T.TONE
O LFE MIX CONTROL
O LFE OUT CONTROL
-
- Not use
O S.MUTE
-
- Not use
O Usual "VSS"
-
- Not use
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