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£.
Patching the
~3plifier
as a Summer/Inverter
Five precision input/£eedback resistors are terminated at the front of each ampli-
fier section of the pEtch block.
Three of these resistors have a value of lOOK
each, and are designated 1 on the patch block.
The two remaining resistors, with
a value of 10K each, are connected to terminals designated 10.
The other end of
each resistor is connected to a common bus, and terminated at a point designated SJ
(summing junction) on the patch block.
The input of the amplifier is terminated
at a point designated B (base), and the output of the amplifier is connectd
to
five 0 terminals in the red area of the patch block.
To patch an amplifier as a summer or inverter, insert a double (four-prong) bottle
plug as shown in the upper amplifier of Figure 3a.
A voltage applied to one of the
1 input terminals is multiplied by -1, and the amplifier is referred to as an in-
verter (Figure 3b).
If two inputs (for example x and y) are connected to the 1
inputs as shown in Figure 3c, the output of the amplifier is equal to -(x
+
y),
and the amplifier is acting as a summer.
The lower amplifier of Figure 3a is patched with two prong bottle plugs to provide
one gain-of-one input and three gain-of-one-tenth
inputs~
as shown in Figure 3d.
h.
Patching the Amplifier as an Integrator
The amplifier becomes an integrator by providing the proper patching connections
to an integrator network.
Two types of integrator networks are available for the
TR-20.
Each network contains the passive elements and control circuits necessary
to form two integrators.
The Model 12.1116 is supplied with computers that are not
equipped for repetitive operation.
The Model 12.1115 is supplied as a part of the
repetitive operation expansion group (see Section 11 of this chapter).
Both net-
works are similar, and are
~escribed
here.
(1)
Integrator Network 12.1116.
Figure 9 is a diagram which illustrates
the patching required to convert an amplifier into an integrator.
The patching is
straight-forward, with the S4, 0, and B terminals of the amplifier connected to the
SJ,
0,
and
B
terminals respectively of an integrator network.
Two additional
patching connections are required on the 12.1116 Integrator Network, indicated by
the heavy lines in the lower cross-hatched area of the integrator patch block
(Figure 9).
These connections may be easily made by inserting two-prong bottle
plugs in this area.
The diagram at the right side of Figure 9 shows the essential components of one
half of a dual integrator network.
The relays (Kl and K2) are common to both
sections of the network, although only one set of contacts is shown for each.
Both
relays are shown de-energized, as they exist in the hold mode.
In this mode, the
inputs at the SJ terminal are connected to ground by the contacts of Kl.
The initial
condition voltage is also connected to ground (through a 10K resistor) by the con-
tacts of K2.
The capacitor remains connected as the feedback element of the ampli-
fier, between the Band
°
terminals.
This allows the capacitor to retain any volt-
age which may have been applied during the operate or reset modes, and the output
of the integrator remains constant.
22
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