JVC KS-FX230 Service Manual page 15

3.Block diagram
XIN
XOUT
FMIN
AMIN
SNS SNSFF
VDD
VSS
V-DET
HCTR
1/2
LCTR
HOLD
TEST1
TEST2
PA0
PA1
BUS
PA2 DRIV.
PA3
PB0
LATCH
PB1
BUS
PB2
DRIV.
BP3
PC0
LATCH
PC1
BUS
PC2
DRIV.
PC3
PD0
LATCH
PD1
BUS
PD2
DRIV.
PD3
PE0
SCK2/PE1
LATCH
BUS
PO2/PE2
DRIV.
SI2/PE3
PF0
SCK1/PF1
LATCH
BUS
SO1/PF2
DRIV.
SI1/PF3
PF0
SCK1/PF1 LATCH
BUS
SO1/PF2
DRIV.
SI1/PF3
DIVIDER REFERENCE DIVIDER
1/16, 1/17
PROGRAMMABLE DIVIDER
1/114, 1/124
LATCH
UNIVERSAL
COUNTER
(20bits)
RAM
512 4bits
ROM
12K 16bits
ADDRESS DECODER
PROGRAM COUNTER
STACK
SIO
SELECTOR
ADDRESS
DECODER
BUS
DRIVER
INSTRU-
CTION
DECODER
JUDGE
ALU
ADC
KS-FX230
PHASE
DETECTOR
UNLOCK SUB
F/F C.P.
PHASE
DETECTOR
LATCH
LATCH
BUS
DRIV.
LATCH
BUS
DRIV.
LATCH
BUS
DRIV.
MPX
BEEP
LATCH
BUS
DRIV.
LATCH
BUS
DRIV.
LATCH
BUS
DRIV.
INTERRUPT
LATCH
BUS
DRIV.
BUS
DRIV.
MPX
BUS
DRIV.
E01
E02
SUBPD
EO3
PQ0
PP3
PP2
PP1
PP0
PO3
PO2
PO1
PO0
PN3
PN2
PN1
PN0/BEEP
PM3
PM2
PM1
PM0
PL3
PL2
PL1
PL0
PK3
PK2
PK1/INT1
PK0/INT0
PJ3
PJ2
PJ1
PJ0
PI1/ADI5
PI0/ADI4
PH3/ADI3
PH2/ADI2
PH1/ADI1
PH0/ADI0
1-15