JVC XV-S40BK Service Manual page 46

XV-S40BK/XV-S42SL/XV-E100SL
2.Pin function (2/5)
Pin No. Symbol
37
VSS
38
NC
39
NC
40
NC
41
NC
42
NC
43
PIO0
44
VSS
45
VDD
46
PIO1
47
PIO2
48
PIO3
49
PIO4
50
PIO5
51
PIO6
52
PIO7
53
MDATA0
54
MDATA1
55
VDD
56
VSS
57
MDATA2
58
MDATA3
59
MDATA4
60
MDATA5
61
MDATA6
62
MDATA7
63
MDATA15
64
VDD
65
VSS
66
MDATA14
67
VDD
68
VSS
69
MDATA13
70
MDATA12
71
MDATA11
72
MDATA10
73
MDATA9
74
VDD
75
VSS
76
MDATA8
77
LDQM
78
SD-CLK
79
CLKSEL
80
MADDR9
81
MADDR8
82
VDD
83
VSS
84
MADDR7
1-34
I/O
Connect to ground
-
Non connect
-
Non connect
-
- Non connect
Non connect
-
Non connect
-
Programmable I/O terminal
I/O
Connect to ground
-
- Power supply terminal 3.3V
I/O Programmable I/O terminal
Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
I/O Programmable I/O terminal
Programmable I/O terminal
I/O
SDRAM data
I/O
SDRAM data
I/O
Power supply terminal 3.3V
-
Connect to ground
-
I/O SDRAM data
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
I/O SDRAM data
I/O SDRAM data
Power supply terminal 3.3V
-
Connect to ground
-
SDRAM data
I/O
Power supply terminal 2.5
-
- Connect to ground
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
- Power supply terminal 3.3V
Connect to ground
-
SDRAM data
I/O
SDRAM Lower or upper mask
O
SDRAM Clock
O
Selects SYSCLK or VCLK as clock source. Normal operation is to tie HIGH.
I
O SDRAM address
SDRAM address
O
Power supply terminal 3.3V
-
Connect to ground
-
SDRAM address
O
Description