Timer Block Diagram - Panasonic DMP-BD45GA Service Manual

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6.3.

Timer Block Diagram

DIGITAL P.C.B.
DR_P_ON_H
JC_P_ON[H]
TO DIGITAL P.C.B.
REGULATOR
HDMI_P_ON_H
BLOCK SECTION
P_STANDBY_H
JK56001-13PIN
Q56004,
Q56003
Q56002
Q56001
SWITCHING
B
BUFFER
IC57005
(RESET)
PW_12.2V
2
1
VDD
OUT
IC57006
5
VDD
PW_5.9V
OUT
4
1 ON
IC51001
(PEAKS-PRO2)
XCINTM
T33
XCINTP
V30
XCMPREQ
T32
CSBPTM
U34
CSBMTP
V32
XCSCLK
U33
IC57001
(TIMER)
43
DR_P_ON_H
JC_P_ON[H]
49
55 HDMI_P_ON_H
42
P_STANDBY_H
FL_DCDC
41
28
HDMI_MONI(CEC_IN)
26
HDMI_CEC_OUT
9
10MHz IN
X57001
10MHz
(MAIN CLK)
8
10MHz OUT
FL_CS[L]
21
14 RESET
FL_CLK
20
FL_TXD
18
59
DR_PFAIL [L]
31
PFAIL [L]
REMOCON 27
6
VREF
7
VDD(3.3V)
KEYIN3_OP_CL 1
29
XINTM(TBUS)
22
XINTM_OUT
KEYIN2 2
23
XINTP_OUT
30
XMPREQ(TBUS)
15
TBUS_TXD
KEYIN3_POWER 3
16
TBUS_RXD
17
TBUS_CLK
POWER P.C.B.
T1101
DISPLAY POWER
SWITCHING
Q1170
TRANSFOMER
9
PW_X_SW12.2V
1
3
P58001
P1102
QR1170
10
FL P.C.B.
IC7001
(DISPLAY/LED DRIVE)
30
VEE
PW_X_SW3.3V
13
VDD
43
VDD
P58001
P1102
P1103
P7001
9
STB
3
5
P58001
P1102
P1103
P7001
8
CLK
6
4
P58001
P1102
P1103
P7001
7
DIN
5
7
6
DOUT
P58001 P1102
P1103 P7001
6
8
P58001 P1102
P1103 P7001
8
10
P58001 P1102
P1103 P7001
7
9
P58001 P1102
P1103 P7001
9
11
22
D1176
8
6
D1173
5
4
D1171
QR1170
DP7001
15
P1
16
P2
17
P3
F-
18
P4
19
P5
F-
20
P6
SG1
14
21
P7
22
F+
31
P8
TIMER
23
P9
DISPLAY
SG1-SG18
F+
32
24
P10
SG16
29
25
P11
SG17 31
26
P12
27
SG18 32
P13
28
P14
29
P15
6
P16
5
P17
4
P18
7
8 9
1
0
1
1
1
2 13
GR7
36
GR1-GR7
GR1
42
IR7001
REMOTE CTL.
1
2
SENSOR
OPEN/CLOSE_SW
POWER_SW P.C.B.
PJ7004 PJ7551
1
DMP-BD45GA/GC/GN/GT/GW/PU
DMP-BD65GN/PU/PX
TIMER BLOCK DIAGRAM
F+
F-
VP
PW-21V
P7001 P1103
4
PW-18V
P7001 P1103
1
1
2
PW-15V
P7001 P1103
3
PW_X_SW3.3V
S7001
STOP
S7003
PLAY
S7002
POWER_SW
S7551

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