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ISP1301 USB OTG Transceiver Eval Kit User’s Guide Revision History: Version Date Descriptions Feb 2003 First release We welcome your feedback. Send it to wired.support@philips.com. Philips Semiconductors - Asia Product Innovation Centre Visit www.semiconductors.philips.com/buses/usb User’s Guide Rev. 1.0 www.flexiusb.com February 2003...
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Philips Semiconductors This is a legal agreement between you (either an individual or an entity) and Philips Semiconductors. By accepting this product, you indicate your agreement to the disclaimer specified as follows: DISCLAIMER PRODUCT IS DEEMED ACCEPTED BY RECIPIENT. THE PRODUCT IS PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND.
7.3. USB OTG C ONTROLLER INTERFACE SCHEMATICS OF THE EVALUATION BOARD ...14 BILL OF MATERIALS...17 REFERENCES ...18 UM10028_1 User’s Guide ISP1301 USB OTG Transceiver Eval Kit User’s Guide ...6 ...6 ...9 ...12 C converter ... 12 (J10) PIN ASSIGNMENT (J13)
To verify the functions of the ISP1301 by using the DOS test program that is provided with the evaluation kit, connect the ISP1301 evaluation board to the parallel port of a PC. To fully verify the functions of the ISP1301, a USB OTG controller is used to connect to the ISP1301 board through the defined interface connector.
Power requirements By default, the ISP1301 board is powered by a +5.0 V power supply through the DC jack (J12, inner +). The +5.0 V power can also be supplied from the USB Type-B connector (J4). However, when J4 is connected to a USB port on the PC, leave the USB mini-AB connector (J9) unconnected.
If an OTG Controller is connected to the ISP1301, the USB port functions as an OTG dual-role device and only the mini-AB connector (J5) will be used. If a Host Controller is connected to the ISP1301, the USB port functions as a host and only the Type-A connector (J1) will be used.
5. Test program 1301.EXE 5.1. Introduction A DOS test program “1301.exe” is provided to help you verify the functions of the ISP1301 chip. The program uses the PC parallel port to access the ISP1301 registers through the I software I C master at the hardware abstraction layer (HAL).
The program will prompt you to enter your choice based on the hardware setting of the ADR pin. If ADR is HIGH, select 1. The slave address for the ISP1301 will become 0x5A. If ADR is LOW, select 0. The slave address for the ISP1301 will become 0x58.
Select Mode of Operation You can select the mode of operation of the ISP1301 by selecting item 5 from the main menu. A submenu will appear on the screen. See Figure 5-4. The possible choices include the USB functional mode (four data encoding and decoding methods), transparent I down mode.
ISP1362 or ISP1161x ISA interface board, or any other generic 8-bit microprocessor interface through a 40-wire IDE cable. The PC or other microprocessor can service the interrupt from the ISP1301 and access the registers of the ISP1301 through this interface.
Required signals include D0–D7, A0, WR_N, RD_N, CS_N, INT1 and INT2. Table 7-2 shows the pin assignment for J13. Note: We use a 20 x 2 header to make it compatible with the Philips ISP1362 and ISP1161x ISA interface boards. Table 7-2: 8-bit microprocessor-interface 20 x 2 header (J13) pin assignment...
Table 7-4: OTG Controller interface J3 pin assignment Pin no Pin name n. c. RESET_N 8. Schematics of the evaluation board UM10028_1 User’s Guide ISP1301 USB OTG Transceiver Eval Kit User’s Guide Pin no Pin name OE_TP_INT_N DAT_VP SE0_VM Pin no Pin name...