Diagrams; Ic Pin Descriptions - Sony CDX-C680 Service Manual

4-1. IC PIN DESCRIPTIONS

• IC501 CXD2548R (DIGITAL SERVO, DIGITAL SIGNAL PROCESSOR) (SERVO BOARD)
Pin No. Pin Name
1 SYSM
2 RMUT1
3 LMUT2
4 CKOUT
5 VDD0
6 SBSO
7 EXCK
8 SQCK
9 SQSO
10 SENS
11 SCLK
12 DATA
13 XLAT
14 CLOK
15 XRST
16 ACDT
17 PWM1
18 XLON
19 SPOA
20 WFCK
21 GTOP
22 XUGF
23 XPCK
24 GFS
25 RFCK
26 C2PO
27 XROF
28 SCOR
29 MNT0
30 MNT1
31 MNT3
32 VSS1
33 DOUT
34 ATSK
35 MIRR
36 DFCT
37 FOK
38 VDD1
39 VPCO1
40 VPCO2
41 VCK.I
42 V16M
43 VCTL
44 PCO
45 FILO
46 FILI
47 AVSS4
48 CLTV
49 AVDD4
50 RFAC
51 BIAS
SECTION 4

DIAGRAMS

I/O
I System mute input (Not used.)
O R-ch, "0" detection output. ("H" : ON, "L" : OFF) (Not used.)
O L-ch, "0" detection output. ("H" : ON, "L" : OFF) (Not used.)
O Master clock frequency division output (Not used.)
— Digital power supply
O Serial output of sub-P to W. (Not used.)
I Clock input for SBSO read output. (Not used.)
I Clock input for SQSO read output.
O SubQ 80 bit, PCM peak and level data 16 bit output.
O SENS output. Output to CPU.
I Clock input for SENS real data read.
I Serial data input from CPU.
I Latch input from CPU. Latch serial data at the falling edge.
I Serial data transfer clock input from CPU.
I System reset ("L" : Reset)
O Not used.
I External control input of spindle motor.
O Microcomputer extension interface (Output) (Not used.)
I Microcomputer extension interface (Input A) (Not used.)
O WFCK (Write Flame Clock) output
O GTOP output
O XUGF output (Not used.)
O XPLCK output (Not used.)
O GFS output
O RFCK output
O C2PO output (Not used.)
O XROF output
O "H" output at either detection, sub code sync S0 or S1.
O MNT0 output (Not used.)
O MNT1 output (Not used.)
O MNT3 output (Not used.)
— Digital GND
O Digital-Out output
I For anti-shock.
O Mirror signal output (Not used.)
O Diffect signal output (Not used.)
O Focus OK signal output
— Digital power supply
O Charge pump output for wideband EFM PLL.
O VCO2 charge pump output for wideband EFM PLL.
I VCO2 oscillator input for wideband EFM PLL.
O VCO2 oscillator output for wideband EFM PLL.
I VCO2 control input for wideband EFM PLL.
O Charge pump output for master PLL.
O Filter output for master PLL (slave = digital PLL).
I Filter input for master PLL.
— Analog GND
I VCO control voltage input for master.
— Analog power supply
I EFM signal input
I Asymmetry circuit constant current input
– 30 –
Pin Description