Sharp LC-37SD1E Service Manual page 80

LC-37SA1E/RU
Pin No. Pin Name
21 GND*
22 #TMS
23 #TDI
24 #TCK
25 #TDO
26 VSYNC
27 HSYNC
28 GND*
29 GND*
30 DMY_IN
31 VCCIO1
32 GNDIO
33 GND*
34 GND*
35 SCK
36 GND*
37 GND*
38 GND*
39 GND*
40 GND*
41 SEN
42 SDA
43 GND*
44 GND*
45 VCCIO1
46 GNDIO
47 GND*
48 GND*
49 GND*
50 GND*
51 GND*
52 GND*
53 GND*
54 GND*
55 GND*
56 GND*
57 GND*
58 GND*
59 VCCIO2
60 GNDIO
61 GND*
62 GND*
63 VCCINT
64 GND*
65 GNDINT
66 GND*
67 GND*
68 GND*
69 GND*
70 GND*
71 GND*
72 GND*
73 GND*
74 GND*
75 GND*
76 EXP [1]
77 GND*
78 GND*
79 GNDIO
80 VCCIO2
81 GND*
82 GND*
83 GND*
84 GND*
I/O
– N.C.
I Pin for JTAG write
I Pin for JTAG write
I Pin for JTAG write
O Pin for JTAG write
I V sync input (not used)
I H sync input (not used)
– N.C.
– N.C
I Dummy pin for RESET line wiring (no effect on operation)
– VCC (3.3V)
– Ground.
– N.C.
– N.C.
I Microprocessor control bus clock
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
I Microprocessor control bus enable
I Microprocessor control bus data
– N.C.
– N.C.
– VCC (3.3V)
– Ground.
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
– N.C.
– VCC (3.3V)
– Ground.
– Ground.
– Ground.
– VCC (3.3V)
– Ground.
– Ground.
– N.C.
– N.C
– N.C
– N.C
– N.C
– N.C
– N.C
– N.C
– N.C
– N.C
O Outport [1]
– N.C
– N.C.
– Ground.
– VCC (3.3V)
– N.C.
– N.C.
– N.C.
– N.C.
Pin Function
5 – 15
Sheet Name
N.C.
FPGA_TMS
FPGA_TDI
FPGA_TCK
FPGA_TDO
V_SYNC
H_SYNC
N.C.
N.C.
RESET_N
FPGA_VCC
Ground.
N.C.
N.C.
SCK
N.C.
N.C.
N.C.
N.C.
N.C.
SDE
SDA
N.C.
N.C.
FPGA_VCC
Ground.
N.C.
N.C
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
FPGA_VCC
Ground.
N.C.
Ground.
FPGA_VCC
Ground.
Ground.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
EP1
N.C.
N.C.
Ground.
FPGA_VCC
N.C
N.C
N.C
N.C