Sharp LC-37SD1E Service Manual page 74

LC-37SA1E/RU
Pin No. Pin Name
95 GND3.3IO1
96 VSUP3.3IO1
97 OSDCLK
98 OSDFSW
99 P3_7
100 P3_6
101 P3_5
102 P3_4
103 OSDB1
104 OSDB0
105 P3_3
106 P3_2
107 OSDG1
108 OSDG0
109 P3_1
110 P3_0
111 OSDR1
112 OSDR0
113 GND3.3IO1
114 VSUP3.3IO1
115 P2_7
116 P2_6
117 P4_1
118 P4_0
119 P4_3
120 P4_2
121 PCLK2
122 PCLK1
123 GND1.8DIG
124 VSUP1.8DIG
125 LVDSA_4P
126 LVDSA_4N
127 VSUP3.3LVDS
128 LVDSA_3P
129 LVDSA_3N
130 GND3.3LVDS
131 LVDSA_CLKP
132 LVDSA_CLKN
133 VSUP3.3LVDS
134 LVDSA_2P
135 LVDSA_2N
136 GND3.3LVDS
137 LVDSA_1P
138 LVDSA_1N
139 VSUP3.3LVDS
140 LVDSA_0P
141 LVDSA_0N
142 VSUP1.8LVDS
143 REXT
144 GND1.8LVDS
145 LVDSB_3P
146 LVDSB_3N
147 GND3.3LVDS
148 LVDSBCLKP
149 LVDSBCLKN
150 VSUP3.3LVDS
151 LVDSB_2P
152 LVDSB_2N
153 GND3.3LVDS
154 LVDSB_1P
155 LVDSB_1N
156 VSUP3.3LVDS
157 LVDSB_0P
158 LVDSB_0N
I/O
– Ground Digital Input/Output Port 1
– Supply Voltage Input/Output Port 1, 3.3 V
I/O Graphic Clock Input/Output
I/O Graphic Fast Switch Input/Output
I/O Port3,bit7 Input/Output
I/O Port3,bit6 Input/Output
I/O Port3,bit5 Input/Output
I/O Port3,bit4 Input/Output
I/O Graphic Blue 1 Input/Output
I/O Graphic Blue 0 Input/Output
I/O Port3,bit3 Input/Output
I/O Port3,bit2 Input/Output
I/O Graphic Green 1 Input/Output
I/O Graphic Green 0 Input/Output
I/O Port3,bit1 Input/Output
I/O Port3,bit0 Input/Output
I/O Graphic Red 1 Input/Output
I/O Graphic Red 0 Input/Output (LSB)
– Ground Digital Input/Output Port 1
– Supply Voltage Input/Output Port 1, 3.3 V
I/O Port2,bit7 Input/Output
I/O Port2,bit6 Input/Output
I/O Port4,bit1 Input/Output
I/O Port4,bit0 Input/Output
I/O Port4,bit3 Input/Output
I/O Port4,bit2 Input/Output
O Flat Panel Control Clock 2 Output
O Flat Panel Control Clock 1 Output
– Ground Digital Core
– Supply Voltage Digital Core, 1.8 V
O LVDS Channel 1 bit 4 Positive Output 2)
O LVDS Channel 1 bit 4 Negative Output 2)
– Supply Digital Voltage LVDS2) Port, 3.3 V
O LVDS Channel 1 bit 3 Positive Output 2)
O LVDS Channel 1 bit 3 Negative Output 2)
– Ground Digital LVDS2), 3.3 V
O LVDS Channel 1 Clock Positive Output 2)
O LVDS Channel 1 Clock Negative Output 2)
– Supply Digital Voltage LVDS2), 3.3 V
O LVDS Channel 1 bit 2 Positive Output 2)
O LVDS Channel 1 bit 2 Negative Output 2)
– Ground Digital LVDS2), 3.3 V
O LVDS Channel 1 bit 1 Positive Output 2)
O LVDS Channel 1 bit 1 Negative Output 2)
– Supply Digital Voltage LVDS2), 3.3 V
O LVDS Channel 1 bit 0 Positive Output 2)
O LVDS Channel 1 bit 0 Negative Output 2)
– Supply Analog Voltage LVDS2), 1.8 V
– LVDS External Resistor2)
– Ground Analog LVDS2), 1.8 V
O Dual-LVDS Channel 2 bit 3 Positive Output 2)
O Dual-LVDS Channel 2 bit 3 Negative Output 2)
– Ground Digital LVDS2), 3.3 V
O Dual-LVDS Channel 2 Clock Positive Output 2)
O Dual-LVDS Channel 2 Clock Negative Output 2)
– Supply Digital Voltage LVDS2), 3.3 V
O Dual-LVDS Channel 2 bit 2 Positive Output 2)
O Dual-LVDS Channel 2 bit 2 Negative Output 2)
– Ground Digital LVDS2), 3.3 V
O Dual-LVDS Channel 2 bit 1 Positive Output 2)
O Dual-LVDS Channel 2 bit 1 Negative Output 2)
– Supply Digital Voltage LVDS2), 3.3 V
O Dual-LVDS Channel 2 bit 0 Positive Output 2)
O Dual-LVDS Channel 2 bit 0 Negative Output 2)
Pin Function
5 – 9
Sheet Name
GND
3.3V
open
open
HP JSW (HP PLUG)
HOTP_CONT1
HOTP_CONT0
HDMI_INT
open
open
P3_3
open
open
open
BL_ERR
DTM_IRQ
open
Open
GND
3.3V
FPGA_SDA
FPGA_SCK
FPGA_SDE
SVIJSW
HSYNC_OSC
VSYNC_OSC
Open
PCLK
GND
1.8V
Open
Open
3.3V
LVDS3P
LVDS3N
GND
LVDSCP
LVDSCN
3.3V
LVDS2P
LVDS2N
GND
LVDS1P
LVDS1N
3.3V
LVDS0P
LVDS0N
1.8V
REXT
GND
Open
Open
GND
Open
Open
3.3V
Open
Open
GND
Open
Open
3.3V
Open
Open