Pioneer PDP-502MX Service Manual page 25

PDP-502MX, PDP-502MX
•
Pin Function
No.
Name
I/O
Description
1
DGND
—
GND
of
digital
part
2
1
9
MA7
1
MAO
0
Address
output
for
external
EDO
memory
10
MCAS
0
CAS
output
for external
EDO
memory
11
MWE
0
WE
output
for
external
EDO
memory
12
MOE
0 OE
output for external
EDO
memory
13
1
28
MI015
1
MIOO
I/O
Data
input/output for external
EDO
memory
29
DGND
—
fsc Generator
GND
of
digital part
30
XI
1
fsc Generator Reference
clock input
(Connected
to
X'tal)
31
XO
0
fsc
Generator Reference
clock
inversion input (Connected
to
X'tal)
32
DVDD
—
fsc
Generator Power
supply
of
digital
part
33
1
36
H03
(MSB)
1
HOO
(LSB)
o
Data
output
for
external
field
memory
37
HWCK 0
Write clock output
for external
field
memory
38
HRCK
0
Read
clock output
for external
field
memory
39
HRST
o
Reset
signal
output
for
external
field
memory
40
DGND
—
GND
of
digital
part
41
1
44
HI3 (MSB)
1
HI0 (LSB)
1
Input for external
field
memory
45
DVDD
—
Power
supply of
digital part
46
AVDD
—
fsc
Generator Power
supply
of
DAC
47
FSCO
—
fsc Generator
fsc output
48
AGND
—
fsc
Generator
GND
of
DAC
49
AGND
—
8fsc-PLL
GND
50 FSCI
—
fsc input
51
CPLL
—
Filter
output
52
RPLL
1
Test
input
53
AVDD
—
Power
supply
of
8fsc-PLL
part
54
CKMD
O/l
Selection
of
CLK8
test
mode
L:
Normal,
H:
Test
mode
55
DGND
—
Digital
GND
56
CLK8
1
8fsc clock output
(CLK8
test
mode:
8fsc clock
input)
57
RSTB
1
System
reset input
58
SLA0
1
Input selection of
l
2
C
bus
slave
address
(L:
B8/B9h,
H:
BA/BBh)
59
SCL
1 l
2
C
bus
clock
input
60
SDA
I/O
l
2
C
bus data
input/output
No.
Name
I/O
Description
61
ST0
0
Output
of internal signal monitor
62
ST1
63
NSTD
0
Non-standard
detection monitor output
(L:
standard,
H:
Non-standard)
64
DVDD
—
Power
supply
of
digital
part
65
1
74
DYCOO
(LSB)
1
DYC09
(MSB)
I/O
EXADINS=0:
Digital
YC
signal alternate
output
EXADINS=1
:
Data
input for external
Y-ADC
75
ALTF
0
EXADINS=0:
Digital
YC
signal alternate
flug
output
(L:
Y, H:
C)
EXADINS=1
:
4fsc clock output
for
external
Y-ADC
76
CSI
1
Composite
sync
input
77
TEST
1
Test
terminal
for
1C selection
(L:
Normal,
H:
Test
mode)
78
LINE
1
Processing
selection input
between
compulsion
lines
(L:
Normal,
H:
Test
mode)
79
KIL
1
External
killer
input
(L:
Normal,
H:
Y/C
sepa. forced
release)
80
DGND
—
GND
of digital part
81
AVDD
—
Power
supply
for
Y-DAC
and
C-DAC
82
CBCP 0
C-DAC
phase compensation
output
83
ACO o
C-DAC
analog
C
signal
output
84
AYO 0
Y-DAC
analog
Y
signal output
85
CBPY 0
Y-DAC
phase compensation
output
86
AGND
—
GND
for
Y-DAC
and
C-DAC
87
AGND
—
GND
for
Y-ADC
88 AYI
1
Y-ADC
analog composite
signal/
Y
signal input
89
VCLY
0
Y-ADC
clamp
potential
output
90
VRBY
o
Y-ADC
bottom reference voltage output
91
VRTY
0
Y-ADC
top reference voltage output
92
AVDD
—
Power
supply
for
Y-ADC
93
AVDD
—
Power
supply
for
C-ADC
94
VRTC 0
C-ADC
top reference voltage output
95
VRBC
0
C-ADC
bottom reference voltage output
96 ACI
1
C-ADC
analog
C
signal input
97
AGND
—
GND
for
C-ADC
98
MRAS 0
RAS
output
for external
EDO
memory
99
MA8
0
Address
output
for
external
EDO
memory
100
DVDD
—
Power
supply
of
digital
part
25