Denon DVD-3800 Service Manual page 45

SM8701BM (MA: IC109)
MLEN/R2 1
P/S 2
V 3
DD
GND 4
XTO 5
XTI 6
GNDP 7
V P 8
DD
V 3 9
DD
MO 10
64M SDRAM (MA: IC702)
W986432AH
V 1
CC
2
DQ0
3
V Q
CC
4
DQ1
5
DQ2
6
V Q
SS
DQ3 7
DQ4 8
V Q
9
CC
DQ5 10
DQ6 11
V Q
12
SS
DQ7 13
14
NC
V 15
CC
DQM0 16
17
WE
CAS 18
19
RAS
CS 20
NC 21
BS0 22
BS1 23
A10/AP 24
A0 25
26
A1
27
A2
28
DQM2
29
V
CC
30
NC
31
DQ16
V Q 32
SS
DQ17 33
DQ18
34
V Q 35
CC
DQ19 36
DQ20
37
V Q 38
SS
DQ21 39
DQ22 40
V Q 41
CC
DQ23 42
V 43
CC
SM8701BM Terminal Function
Pin No.
20 MCK/R1
1 MLEN/R2
19 MDT/R0
2 P/S
18 RSTN
3 V
17 SO3
4 GND
16 V O
DD
5 XTO
GNDO
15
6 XTI
SO2
14
7 GNDP
13 SO4
8 V
9 V
12 SO1
10 MO
11 MON
11 MON
12 SO1
13 SO4
14 SO2
15 GNDO
16 V
17 SO3
18 RSTN
19 MDT/R0
20 MCK/R1
Note: 1. Schmitt trigger input with pull-down resistor
2. Schmitt trigger input with pull-up resistor
W986432AH Terminal Function
Pin No.
86 V
SS
85
DQ15
25~27, 60~66, 24
84
V Q
CC
83
DQ14
22, 23
82
DQ13
2, 4, 5, 7, 8, 10, 11 ,13,
81
V Q
CC
31, 33, 34, 36, 37, 39,
80 DQ12
40, 42, 45, 47, 48, 50,
79 DQ11
51, 53, 54, 56, 74, 76,
V Q
78
SS
77, 79, 80, 82, 83, 85
77 DQ10
76 DQ9
20
V Q
75
CC
74 DQ8
19
73
NC
18
72 V
SS
17
71 DQM1
70
NC
16, 28, 59, 71
69 NC
68
68
CLK
67
67 CKE
66 A9 1, 15, 29, 43
65 A8
44, 58, 72, 86
64 A7
3, 9, 35, 41, 49, 55,
63 A6
75, 81
62 A5
6, 12, 32, 38, 46, 52,
61
A4
78, 84
60
A3
59 14, 21, 30, 57, 69,
DQM3
58 70, 73
V
SS
57
NC
56
DQ31
55 V Q
CC
54 DQ30
DQ29
53
52 V Q
SS
51 DQ28
DQ27
50
49 V Q
CC
48 DQ26
47 DQ25
46 V Q
SS
45 DQ24
44 V
SS
Pin Name I/O
Control signal input.
1
Ip In serial mode: latch enable signal
In parallel mode: sampling rate select signal
Mode select signal.
1
Ip
LOW: serial mode, HIGH: parallel mode
 5V supply (Digital block)
DD
 Ground (Digital block)
O Reference signal crystal oscillator element connection
Reference signal crystal oscillator element connection
I
or external clock input
 Ground (PLL block)
 5V supply (PLL block)
P
DD
 3.3V supply (output buffer)
3
DD
O 27 MHz fixed-frequency output
O 27 MHz fixed-frequency output (inverted)
O 33.8688 MHz fixed-frequency output
O 768fs output
O 256fs output
 Ground (output buffer)
 3.3V supply (output buffer)
O
DD
O 384fs output
2
Ip LOW-level reset input
Control signal input.
Ip 1 In serial mode: control data input signal
In parallel mode: sampling frequency select signal
Control signal input.
1
Ip In serial mode: clock signal
In parallel mode: sampling frequency select signal
Pin Name
A0-A10 Address for row and column
Bank Select to activate during row
BS0, BS1
address latch time
DQ0-DQ31 Data Input / Output pins for data
Chip Selec to disable or enable the
CS
command decoder
RAS Row Address Strobe
CAS Column Address Strobe
WE Write Enable
DQM0-DQM3 Input / Out put Mask
CLK Clock Inputs
CKE Clock Enable
V Power (+3.3V)
CC
V Ground
SS
V Q Power (+3.3V) for I/O Buffer
CC
V Q Ground for I/O Buffer
SS
NC No Connection
DVD-3800
Function
Function
45