S3.3. Sensor Block Diagram - Panasonic SDR-S10PC Service Manual

S3.3. Sensor Block Diagram

IC291
(CCD IMAGE SENSOR)
PT
11
V
DD
8
Q291
VOUT
7
SUB
10
H1
12
H2
13
R
9
4
1 2 3
V4 V3 V2 V1
FP31
CCD-6R5V
4
FP31
CCD12V
1
51
FP31
53
14
18
REGD3V 20
FP31
3
AF5V
5 4
VIN VOUT
IC301
(REGULATOR)
CONT. GND NC
1 2 3
To SYSCON
(CAM D3OFF)
FP6501
10
FP31
6
FP31
2
FP31
10
FP31
9
FP31
8
FP31
7
IC302
(TG/AFE)
ADC IN
10bit
PGA
ADC
CCD IN
CDS
CLAMP
SCAN
SP1,SP2,ADCK
MAS/SLV
DLL
55 54 22 23 24 21 27 37 38 39
REGD3V
X301
(36MHz) To VIDEO
(CLK18 CAMFCK)
IC303
(VERTICAL DRIVER)
7 14 9
5 V10
3 V20
17 V30
18 V40
S-5
D0 6
USER 9
LOGIC 10bit
11
D9 16
To SYSCON
CLR
19 (CG RST)
OBP,PBLK
TIMING
GENERATOR
40 44 45 46 48 31 32 35 63 62 29 28
CL303
CL302
12 8 13 10
SDR-S10/S18 SENSOR BLOCK DIAGRAM
To VIDEO
(BUS9 ADIN0~9)
To VIDEO
(BUS9 CAMHD)
To VIDEO/SYSCON
(BUS9 CAMVD)