Power Block Diagram - Panasonic Lumix DMC-FZ200P Service Manual

11.5. Power Block Diagram

POWER BLOCK DIAGRAM
FLASH P.C.B.
P8001
F8002
PP8001 PS9001
BAT+ 1
11-14
TO
PP8001 PS9001
BATTERY BAT THERMO 2
5
CATCHER
NC 3
PP8501
PS9001
BAT- 4
1,2,19,20
CL9008
SUB P.C.B.
FP9302 FP9006
14 36
B9301
BACK BATT
TOP OPERATION UNIT
POWER SW
CL9004
ON (POWER ON L)
FP9002
14
RL9111
OFF
IC6001
(VENUS ENGINE)
(POWER SW ON)
GPIO42 AB21
(POWER ON H)
GPIO20 AC18
(SYS RESET)
RSTB AC12
(BATT THERMO)
AD0 IN1 B11
(SW UNREG)
AD0 IN0 A11
(PW SD3018V)
VDD SD Y20
AA22
VDD SD IC6401
(REGULATOR)
1 VOUT VIN
2 VSS
(1R8V ON)
GPIO76
W4
(3R0V ON)
GPIO77 W3
Q6401
(SD POWER ON )
GPIO56 AF10
(S I2C SCL)
GPIO45 AB18
(S I2C SDA)
GPIO47 AB16
(LCD BLT)
GPIO31 AD15
PW BL MINUS
(To FP9003-7)
PW BL PLUS
(To FP9003-6)
Downloaded from www.Manualslib.com
CL9011
(UNREG)
(BAT THERMO)
CL9012
Q9101
VO1
IC9101
(SYSTEM IC)
VO2
(BACKUP)
27 BATT
UNREG 34
VO3
CL1001
POWER CTL SW 35
VO4
87 POWER SW ON L
54 POWER SW ON H
VO5
POWER ON H RESETOUT
84 85
CL6014
VO6
CL6402
CL9102
INV7
QR6402
4
VCNT 3
4 5 6
CL6401
3 2 1
CTL SEQ3
VDD
(To P6401-4A,4B)
CTL SEQ2
CTL SEQ1
QR6401
CTL1234
SCL
SDA
CL1072
CL1071
CL1070
Q1071
manuals search engine
IC1001
(7CH SW REGULATOR)
4
HVREG
DRIVER
CH1
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP1
SERIAL I/F
5
HVREG
DRIVER
CH2
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP2
SERIAL I/F
6
HVREG
Vo3SEL
DRIVER
CH3
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP3
SERIAL I/F
7
HVREG
DRIVER
CH4
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP4
SERIAL I/F
8
HVREG
DRIVER
CH5
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP5
SERIAL I/F
9
HVREG
DRIVER
CH6
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP6
SERIAL I/F
32
VREGD
CH7 DRIVER
STEP UP DC/DC
ERROR AMP7
0.3V (Current mode)
SHUTDOWN
SERIAL I/F
SS TIMER
OVPCOMP
PROTECTION
SCP6
UVLO
TIMER
LDO
SCP
TIMER
VREGD2
C P SW
SCPLDO
13
TIMER
CP
DRIVER
14 VREGD
ON/OFF
LOGIC
16
CP SW
17
18 VREGA
SERIAL
I/F
19 OSC
VREGD
12 21 26 29 27
SEQ RT VREGD2 VREGD
VREGA
56
Hx1
61
Hx1
62
Lx1
63
Lx1
64
PGND1
59
PGND1
60
Hx2
57
Lx2
58
PGND2
56
Hx3
54
Lx3
55
IC1042
PGND3
52 (DC/DC CONVERTER)
PGND3
53
Hx4
49
Hx4
PHASE
50
CONPENSATION
Lx4
51
CURR. F.B.
PGND4 ERROR
48 CURR. LIMIT
PWM
AMP
COMP.
Hx5
44 +
LOGIC
Hx5
45
Lx5
46 VSHORT
Lx5
47
VREF WITH
PWM/PFM
PGND5
42 SOFT START,
SELECTOR
CE
PGND5
43
Hx6
38 CE/MODE RAMP WAVE
CE/MODE
CONTROL GENERATOR
Hx6 4
39
LOGIC OSC
Lx6
40
UVLO
Lx6 COMP.
41 VIN
6
PGND6 UVLO
36
PGND6
37
Lx7
35
PGND7
34
IC1043
VO7
33 (REGULATOR)
4 VIN VOUT 1
3 2
CE VSS
VINREG
30
VINREG
31
REGOUT
22
VDD
10
VREGD2IN
28
HVREG
25
CPLUS
23
VBAT
2
VBAT
3
CMINUS
24
VCC
1
IC1061
GND
(REGULATOR)
20
1 4
CE VIN
2 VSS VOUT 3
CL1050
PW 5.2V
CL1010
PW D1.2V
CL1020
PW D3.0V
IC1021
(REGULATOR) CL1021
4
VIN VOUT 1 PW SE2.8V
3 CE VSS 2
CL1030
PW DM1.2V
CL1040
PW AF3.4V
IC1041
(REGULATOR)
1 4
CNT VDD
CL1041
2 GND VOUT 3 PW A3.1V
VOUT
3
SYNC.
LX
BUFFER
1
DRIVE
CE/
VSS
2
VSS
5
CL1042
PW EVF1.8V
IC1044
(REGULATOR) CL1043
4 VIN VOUT 1 PW SE1.8V
3 2
CE VSS
IC1045
(REGULATOR)
1 4
CE VDD
CL1044
2 VSS VOUT 3
PW D1.8V
CL1060
PW SE1.2V
CL1080
PW HDMI5.0V
DMC-FZ200 POWER BLOCK DIAGRAM