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Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs
FEATURES
• Member of Programmable Clock Generator
Family
– CDCE913/CDCEL913: 1-PLL, 3 Outputs
– CDCE925/CDCEL925: 2-PLL, 5 Outputs
– CDCE937/CDCEL937: 3-PLL, 7 Outputs
– CDCE949/CDCEL949: 4-PLL, 9 Outputs
• In-System Programmabil ty and EEPROM
– Serial Programmable Volatile Register
– Nonv latile EEPROM to Store Customer
Setting
• Flexible Input Clocking Concept
– External Crystal: 8 MHz to 32 MHz
– On-Chip VCXO: Pull Range ±150 ppm
– Single-Ended LVCMOS up to 160 MHz
• Free Selectable Output Frequency up to
230 MHz
• Low-Noise PLL Core
– PLL Loop Filter Components Integrated
– Low Period Jitter (Typical 50 ps)
• Separate Output Supply Pins
– CDCE913: 3.3 V and 2.5 V
– CDCEL913: 1.8 V
V
ctr
VCXO
XO
LVCMOS
3
Programming
S2/S1/S0 or
and
SDA/SCL
Control Register
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TERMINAL
NAME
PIN TSSOP14
Y1–Y3
11, 9, 8
Xin/CLK
1
Xout
14
V
4
Ctrl
V
3
DD
V
6, 7
DDOUT
GND
5, 10
S0
2
SDA/S1
13
SCL/S2
12
V
GND
DD
Divider
and
Output
PLL
Control
EEPROM
with SSC
I/O
O
LVCMOS outputs
I
Crystal oscillator input or LVCMOS clock Input (selectable via SDA/SCL bus)
O
Crystal oscillator output (leave open or pullup when not used)
I
VCXO control voltage (leave open or pullup when not used)
Power
1.8-V power supply for the device
CDCEL913: 1.8-V supply for all outputs
Power
CDCE913: 3.3-V or 2.5-V supply for all outputs
Ground
Ground
I
User-programmable control input S0; LVCMOS inputs; internal pullup 500k
SDA: bidirectional serial data input/output (default configuration), LVCMOS internal
I/O or I
pullup; or
S1: user-programmable control input; LVCMOS inputs; internal pullup 500k
SCL: serial clock input LVCMOS (default configuration), internal pullup 500k or
I
S2: user-programmable control input; LVCMOS inputs; internal pullup 500k
• Flexible Clock Driver
– Three User-Definable Control Inputs
[S0/S1/S2], for example., SSC Selection,
Frequency Switching, Output Enable, or
Power Down
– Generates Highly Accurate Clocks for
Video, Audio, USB, IEEE1394, RFID,
Bluetooth™, WLAN, Ethernet™, and GPS
– Generates Common Clock Frequencies
Used With TI-DaVinci™, OMAP™, DSPs
– Programmable SSC Modulation
– Enables 0-PPM Clock Generation
• 1.8-V Device Power Supply
Wide Temperature Range –40° C to 85° C
• Packaged in TSSOP
• Development and Programming Kit for Easy
PLL Design and Programming (TI Pro-Clock™)
APPLICATIONS
• D-TV, STB, IP-STB, DVD-Player, DVD-Recorder,
Printer
V
DDOUT
LV
Y1
Xin/CLK
1
CMOS
S0
2
V
DD 3
LV
Y2
V
ctr 4
CMOS
GND
5
V
DDOUT 6
LV
Y3
V
CMOS
7
DDOUT
DESCRIPTION
Xout
14
S1/SDA
13
S2/SCL
12
Y1
11
GND
10
Y2
9
Y3
8
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