Sony BDP-S485 Service Manual page 71

AD25 RDQ24_B
AE25 RDQ25_B
AH27 RDQ26_B
AH28 RDQ27_B
AC25 RDQ28_B
AD24 RDQ29_B
AC24 RDQ30_B
AC23 RDQ31_B
P25 RDQM0_B
R24 RDQM1_B
AD26 RDQM2_B
AE26 RDQM3_B
R27 RDQS0_B
R28 RDQS0__B
P28 RDQS1_B
P27 RDQS1__B
AG27 RDQS2_B
AG28 RDQS2__B
AF28 RDQS3_B
AF27 RDQS3__B
AD27 RODT_B
AD28 RRAS__B
AA21 RVREF_3
R23 RVREF_4
AE28 RWE__B
Y26 RRESET_B
A D 7 T C K
A D 8 T I D
AF6 TDO
AE7 TMS
AF7 TRST_
AB3 AVDD12_USB_1P_1
AA3 AVDD33_USB_1P_1
AB6 AVSS12_USB_1P_1
AA5 AVSS33_USB_1P_1
AA6 AVSS33_USB_1P_1
AB1 USB_1P_DM
AB2 USB_1P_DP
AC3 USB_1P_VRT
AC4 AVDD12_USB_2P_1A
AA4 AVDD33_USB_2P_2
AB5 AVSS12_USB_2P_1A
AD1 USB_2P_DM0
AC1 USB_2P_DM1
AD2 USB_2P_DP0
AC2 USB_2P_DP1
AD3 USB_2P_VRT
AC9 EFPWRQ
F5 AVDD33_REC
D4 AVDD33_LD
C5 AVDD33_COM
F6 AVSS33_REC
C4 AVSS33_LD
D5 AVSS33_COM
E5 AVDD12_COM
E6 AVDD12_REC
F7 AVSS12_COM
G7 AVSS12_REC
A2 TXVP_0
B4 TXVP_1
B3 TXVN_0
A4 TXVN_1
D6 REXT
A5 TANA_0
B5 TANA_1
J6 AGND33_1A
L7 AGND33_2
M AGND33_3A
G6 AGND12_1A
M6 AGND12_2A
G4 AUX1 Analog
E4 AVDD12_1A
L5 AVDD12_2A
J5 AVDD33_1A
L6 AVDD33_3A
P5 FECFREQ
R3 FECMOD
N2 FEDMO
U4 FEEJECT_
L4 EQBIAS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
I
O
O
/ I O
/ I O
I/O
I/O
I/O
Power
Power
Ground
Ground
Ground
Analog
Analog
Analog
Power
Power
Ground
Analog
Analog
Analog
Analog
Analog
Power
Power
Power
Power
Ground
Ground
Ground
Power
Power
Ground
Ground
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog Ground
Analog Ground
Analog Ground
Analog Ground
Analog Ground
I/O
Analog Power(1.2V)
Analog Power(1.2V)
Analog Power(3.3V)
Analog Power(3.3V)
3.3V LVTTL I/O,5V-tolerance,
Slow slew,2, 4, 6, 8mA PDR,
75K pull-up
3.3V LVTTL I/O,5V-tolerance,
Slow slew,2, 4, 6, 8mA PDR,
75K pulldown
A n a o l g O u p t t u
3.3V LVTTL I/O,5V-tolerance,
6 mA PDR,75K pull-up
A n a o l g O u p t t u
6-5
Memory data bit 24
Memory data bit 25
Memory data bit 26
Memory data bit 27
Memory data bit 28
Memory data bit 29
Memory data bit 30
Memory data bit 31
Memory data mask bit 0
Memory data mask bit 1
Memory data mask bit 2
Memory data mask bit 3
Memory positive data strobe bit 0
Memory negative data strobe bit 0
Memory positive data strobe bit 1
Memory negative data strobe bit 1
Memory positive data strobe bit 2
Memory negative data strobe bit 2
Memory positive data strobe bit 3
Memory negative data strobe bit 3
Memory on die termination enable
Memory row address strobe
Memory VREF
Memory VREF
Memory write enable
Memory reset
JTAG ICE clock / JTAG boundary scan clock
JTAG ICE data in / JTAG boundary scan data in
JTAG ICE data out / JTAG boundary scan data out
JTAG ICE mode select / JTAG boundary mode select
JTAG ICE reset
1.2V Analog power for USB
3.3V Analog power for USB
Analog ground for USB
Analog ground for USB
Analog ground for USB
USB port3 differential serial data bus (minus)
USB port3 differential serial data bus (plus)
USB reference resistor
1.2V Analog power for USB
3.3V Analog power for USB
Analog ground for USB
USB port1 differential serial data bus (minus)
USB port2 differential serial data bus (minus)
USB port1 differential serial data bus (plus)
USB port2 differential serial data bus (plus)
USB reference resistor
2.5V power for E-fuse programming
HVGA analog power
TX0 analog power
PLL/BG 3.3V analog power
HVGA analog ground
TX0 analog ground
PLL/BG 3.3V analog ground
PLL 1.2V analog power
ADC analog power
PLL 1.2V analog ground
ADC analog ground
Ethernet TD+
Ethernet RD+
Ethernet TD
Ethernet RD
External reference resistor
Ethernet analog test pin #0
Ethernet analog test pin #1
Analog Ground
Analog Ground
Analog Ground
Analog Ground
Analog Ground
Auxiliary Input
Power Pin
Power Pin
Power Pin
Power Pin
Frequency selection signal output, or LDD serial interface data
or I2C SDA. The pin is spike-free at power-on stage.
High frequency modulation mode selection signal output, or
LDD serial interface command enable. The pin is spike-free at
power-on stage.
i D k s m t o r o c o n r t l o o u p t u . t D A C o u p t
Eject/stop key input, active low. The pin is spike-free at poweron
stage.
E x e t n r l a B a i s C o n n e t c o i n f r o i C c r u s t i
BDP-S485
u . t