LG RHT497H Service Manual page 128

Pin
Pin Name
Number
64 CLUMPGT
65 FG
66 DRAMVDD3 Power supply
67 DRAMVDD12D Power supply
68 VHALF
69 PwM0A
PwM0B
70
P10
71 PwM1A
PwM1B
72
P11
PwM2A
73
P27
PwM2B
74 TX
P12
75 PwM3A
P31
76 PwM3B
P31
77 PwM4
78 VSS
79 VDD3 Power supply
80 VDD12 Power supply
81 LPPS
ASENV
82
LPPM
P04
83
GENE0
84 RSDAT
85 RSEN
86 SDAT
87 NRST
88 VDD3 Power supply
89 P30
90 SEN
Connection
I/O
Target
O FEP
I DRIVER
Power supply
Power supply
I/O FEP
O DRIVER
DRIVER
I/O
-
O DRIVER
DRIVER
I/O
-
I/O DRIVER
DRIVER
I/O HOST
-
I/O DRIVER
-
I/O DRIVER
-
O DRIVER
GND GND
Power supply
Power supply
I FEP
I FEP
-
I/O
Mache
I/O FEP
O FEP
I/O FEP
I Reset
Power supply
I/O -
O FEP
Description
RF AGC bias circuit clamp signal
Spindle FG input
DRAM VDD (3.3V)
DRAM VDD (1.2V)
Drive pin central reference voltage input
Focus drive differential PwM+ output, focus drive BSDA output.
Focus drive differential PwM- output
General-purpose I/O (GIO/TxD0/SerialCLK0/PMw0)
Focus 2 (tilt) drive differential PwM+ output, focus 2 drive BSDA
output.
Focus 3 (tilt) drive differential PwM-output
General-purpose I/O (GIO/RxD0/PwM1)
Tracking drive differential PwM+ output, tracking drive BSDA
output
General-purpose I/O (GIO/PwM0)
Tracking drive differential PwM - output
IEC60958-compliant digital output
General-purpose I/O (GIO/TxD0)
Traverse drive differential PwM+ output, stepper 1 drive output
General-purpose I/O (GIO/PwM0)
Traverse drive differential PwM- output, stepper 2 drive output
General-purpose I/O (GIO/RxD0/PwM1)
Spindle drive output
Digital Vss
I/O pad VDD (3.3V)
Internal logic VDD(1.2V)
LPP space input
ASENV input
LPP mark input
General-purpose I/O (GIO/TxD0/PwM1/external interrupt 1)
Inner limit switch input
FEP serial interface data 2 (RF)
FEP serial interface enable 2 (RF)
FEP serial interface data
IC Reset input (power on reset)
I/O pad VDD(3.3)
General-purpose I/O (GIO/TxD1)
FEP serial interface enable
4-47