Table of Contents
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Memory Part
1
DMA[ 0 ..11 ]
R77
DMA0
MA0
1 0 O HM
R90
DMA1
MA1
1 0 O HM
R89
DMA2
MA2
1 0 O HM
R76
DMA3
MA3
D
1 0 O HM
R88
DMA4
MA4
1 0 O HM
R75
DMA5
MA5
1 0 O HM
R87
DMA6
MA6
1 0 O HM
R74
DMA7
MA7
1 0 O HM
R86
DMA8
MA8
1 0 O HM
R73
DMA9
MA9
1 0 O HM
R85
DM A 10
M A 10
1 0 O HM
R84
DM A 11
M A 11
1 0 O HM
C
R78
CS 0#
DCS 0#
3 3 O HM
R70
CS 1#
DCS 1#
3 3 O HM
R71
RAS 0 #
D RA S 0#
3 3 O HM
R72
CA S#
DCA S#
3 3 O HM
R83
WE#
D W E#
3 3 O HM
R69
DQ M X
D QM
3 3 O HM
B
R41
LA 18
C RI TI C AL TR A C E S
R42
WRLL#
M O S T
C LO C K S
O P EN
(0 OHM)
A DD R E S S
C A S
R46
W E
LA 19
R A S
R44
C S x
LA 18
O P EN
L EA ST
D Q M
(0 OHM)
A
1
2
U2
V CC3
21
MA0
A0
22
MA1
A1
23
MA2
A2
24
MA3
A3
27
MA4
A4
28
MA5
A5
29
MA6
A6
30
MA7
A7
31
MA8
A8
32
MA9
A9
20
M A 10
A 10
19
M A 11
BA /A 11
R91
35
D S CK
CLK
1 0 O HM
34
CKE
C46
18
O P EN
CS 0#
CS
(15PF)
17
RAS 0 #
RAS
16
CA S#
CAS
15
WE#
W E
14
DQ M X
D Q ML
36
DQ MH
33
NC
37
NC
S DRA M 5 1 2K X 16 X 2 ( 9 ns)
U7
3
2
LD8
YSS -CS
D0
Q0
4
5
LD9
YSS-C L K
D1
Q1
7
6
LD 10
YSS- CDI
D2
Q2
8
9
LD 11
M C
D3
Q3
13
12
LD 12
M L
D4
Q4
14
15
LD 13
M D
D5
Q5
17
16
LD 14
AUDRS T#
D6
Q6
18
19
LD 15
D7
Q7
1
OC
11
WR2
LCS 2#
CLK
74 F 3 74
U4
LA[ 0 ..21 ]
12
13
LA0
LD0
A0
D0
11
14
LA1
LD1
A1
D1
10
15
LA2
LD2
A2
D2
9
17
LA3
LD3
A3
D3
8
18
LA4
LD4
A4
D4
7
19
LA5
LD5
A5
D5
6
20
LA6
LD6
A6
D6
5
21
LA7
LD7
A7
D7
LA8
27
A8
26
LA9
A9
23
LA 18
LA 10
A 10
25
LA 19
LA 11
A 11
4
LA 12
A 12
28
LA 13
A 13
29
V CC
LA 14
A 14
3
LA 15
A 15
2
32
LA 16
A 16
V CC
30
LA 17
A 17
31
A 18
1
A 19
22
LCS 3#
CE
24
16
LO E#
LO E#
OE
G ND
2 7 C0 4 0 ( 9 0 ns)
JP2
1
2
RS T#
RS T#
RES ET
CLK /CE1
3
4
WRLL#
W RLL#
W E
A D DR/CE1
ROM EMU LA TOR
TP3
LA 20
LA 21
2
3
V CC3
D B[ 0 ..15 ]
2
D B7
D Q0
3
D B6
D Q1
5
D B5
D Q2
6
D B4
D Q3
8
D B3
D Q4
9
D B2
D Q5
11
D B1
D Q6
12
D B0
D Q7
39
D B8
D Q8
40
D B9
D Q9
42
DB 10
D Q 10
43
DB 11
D Q 11
45
DB 12
D Q 12
46
DB 13
D Q 13
D S CK
48
DB 14
D Q 14
49
DB 15
D Q 15
1
V CC
25
V CC
7
V CCQ
13
V CCQ
38
V CCQ
44
V CCQ
4
V S SQ
10
V S SQ
41
V S SQ
47
V S SQ
26
V SS
50
V SS
R39
LA0
SRA M 0
LA1
O P EN
LA2
(0 OHM)
LA3
YS S - CS
LA4
Y SS - CLK
R38
LA5
Y SS - CDI
LA 15
LA6
MC
LA7
ML
LA8
MD
LA9
A U DRS T#
LA 10
LA 11
LA 12
LA 13
LA 14
WRLL#
W RLL#
LO E#
LCS 0#
LD[ 0 ..7 ]
SRA M 0
LA1
LA2
LA3
LA4
LA5
LA6
LA7
LA8
LA9
LA 10
LA 11
LA 12
LA 13
LA 14
WRH L#
W RH L#
LO E#
LCS 0#
3
4
U3
V CC3
V CC3
21
2
MA0
A0
D Q0
22
3
MA1
A1
D Q1
23
5
MA2
A2
D Q2
24
6
MA3
A3
D Q3
27
8
MA4
A4
D Q4
28
9
MA5
A5
D Q5
29
11
MA6
A6
D Q6
30
12
MA7
A7
D Q7
31
39
MA8
A8
D Q8
32
40
MA9
A9
D Q9
20
42
M A 10
A 10
D Q 10
19
43
M A 11
BA /A 11
D Q 11
45
D Q 12
46
D Q 13
R82
35
48
CLK
D Q 14
49
1 0 O HM
D Q 15
34
CKE
C42
1
V CC
18
25
CS 1#
O P EN
CS
V CC
(15PF)
17
7
RAS 0 #
RAS
V CCQ
13
V CCQ
16
38
CA S#
CAS
V CCQ
44
V CCQ
15
WE#
W E
14
4
DQ M X
D Q ML
V S SQ
10
V S SQ
36
41
DQ MH
V S SQ
47
V S SQ
33
26
NC
V SS
37
50
NC
V SS
S DRA M 5 1 2K X 16 X 2 ( 9 ns)
U5
10
11
LD0
A0
D0
9
12
LD1
A1
D1
8
13
LD2
A2
D2
7
15
LD3
A3
D3
6
16
LD4
A4
D4
5
17
LD5
A5
D5
4
18
LD6
A6
D6
3
19
LD7
A7
D7
25
A8
24
A9
21
V CC
A 10
23
A 11
2
28
A 12
V CC
26
14
A 13
G ND
1
A 14
27
W E
22
OE
20
CE1
O P EN
(S RAM 32Kx 8 - 15 )
U6
10
11
LD8
A0
D0
9
12
LD9
A1
D1
8
13
LD 10
A2
D2
7
15
LD 11
A3
D3
6
16
LD 12
A4
D4
5
17
LD 13
A5
D5
4
18
LD 14
A6
D6
3
19
LD 15
A7
D7
25
A8
24
A9
21
V CC
A 10
23
A 11
2
28
A 12
V CC
26
14
A 13
G ND
1
A 14
27
W E
22
OE
20
CE1
O P EN
(S RAM 32Kx 8 - 15 )
COMPANY
G VG
TITLE
GV-DJB930E2.SCH
FILE
SCALE:
SHEET:
SHEET
OF
DATE
DESIGN
DRAWN BY
CHECKED BY
4
D B7
D B6
D B5
D B4
D B3
D B2
D B1
D B0
D B8
D
D B9
DB 10
DB 11
DB 12
DB 13
DB 14
DB 15
C
LD[ 0 ..7 ]
B
LD[ 8 ..15 ]
A
930E2
解 码 板
PCB
图
B/0
REV:
00-11-25
APPROVED BY
41
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