Output Wafer - LG 55UB8500 Service Manual

[51P Vx1

output wafer]

51pin_Wafer
P13000
FI-RE51S-HF-J-R1500
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
R13011 10K
28
Non_INX_Module
29
30
OPT
31
R13033 10K
32
33
34
R13006
35
3D_EN_LGD_120Hz
36
37
R13005
38
Non_LGD_60Hz
39
40
41
42
43
44
45
46
47
48
49
50
51
52
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
+1.8V
LOCKn_IN
TXDAP7_L
TXDAN7_L
TXDAP6_L
TXDAN6_L
TXDAP5_L
TXDAN5_L
R221
HTPDn_IN
TXDAP4_L
0
URSA_TX_HTPD_Pullup
TXDAN4_L
TXDAP3_L
TXDAN3_L
TXDAP2_L
TXDAN2_L +3.3V_NORMAL
R13034
10K
TXDAP1_L
OPT
+3.3V_NORMAL
R13037 0
TXDAN1_L
L_DIM_EN
Non_AUO_Module
R13003
10K
R13007
TXDAP0_L OPT 10K
Non_AUO_Module
TXDAN0_L
R13004
10K
LOCKn_IN LGD_Module
HTPDn_IN
EL_VDD_DETECT_22V
L13001
*Pin31(BIT_SEL) BLM18PG121SN1D
OLED
HIGH or NC : 10Bit
LOW : 8Bit
0 *Pin35(PCID)
High:PCID enable
3D_EN
Low or NC : PCID diable
0
+3.3V_NORMAL
*Pin38
Non_LGD_60Hz: T120 module(UB85)
R13044
10K
R13001 0 OPT
INV_CTL
R13016
OLED R13002 0
Compensation_Done
LGD_Module
OLED
R13009 R13010
0 0
R13045
10K
LGD_Module
+3.3V_NORMAL
R13040
10K
OPT
PANEL_VCC
R13015 0
L13000 LGD_Module
MLB-201209-0120P-N2
51pin_12V
R13041
C13032 C13033
10K
10uF 10uF
LGD_Module
25V 25V
51pin_12V 51pin_12V
Vx1 LOCKAn/HTPDn
Q1404
AO3438
LOCKAn
+1.8V
+3.3V_NORMAL
R209 R211 R222
4.7K 1.5K 10K
URSA_TX_HTPD_Pullup
HTPDAn
Q203
AO3438
URSA_TX_HTPD_Pullup
R220
0
OPT
L/D_EN(Pin30)
- T-Con L/D Function
HIGH : Enable
LOW or NC : Disable
*LGD_120Hz: T240 module (UB98/95,D9)
D9_I2C_SCL
+3.3V_NORMAL
TCON_I2C_EN
R13018
4.7K
OPT
R13013 0 R13061 0
I2C_SCL1
NON_D9_I2C Non_AUO_Module
Q13004
2N7002A
R13055
33 OPT
+3.3V_NORMAL
D9_I2C_SDA
TCON_I2C_EN
R13019
4.7K
OPT
R13062 0
R13012 0
I2C_SDA1
NON_D9_I2C Non_AUO_Module
Q13005
2N7002A
R13059
33 OPT
0
Data_Format_1
Data Input Format[1:0]
*Mode 3 (4 Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High
*Mode 2 (2 Division)
- Data Format 0(Pin37) = High
Data Format 1(Pin36) = Low
Data_Format_0
EL_VDD_DETECT_22V
[41P Vx1
output wafer]
41pin_Wafer
P13001
FI-RE41S-HF-J-R1500
1
2
D9_I2C_SCL
3
D9_I2C_SDA
Not Used Net (UB85/95/UC89)
4
5
GND_Vx1
6
TXDBP11_L
7
TXDBN11_L
8
GND_Vx1_2
9
TXDBP10_L
10
TXDBN10_L
11
12
TXDBP9_L
13
TXDBN9_L
14
15
TXDBP8_L
16
TXDBN8_L
17
18
TXDBP7_L
19
TXDBN7_L
20
21
TXDBP6_L
22
TXDBN6_L
23
24
TXDBP5_L
25
TXDBN5_L
26
27
TXDBP4_L
28
TXDBN4_L
29
30
TXDBP3_L
31
TXDBN3_L
32
33
TXDBP2_L
34
TXDBN2_L
35
36
TXDBP1_L
37
TXDBN1_L
38
39
TXDBP0_L
40
TXDBN0_L
41
42
Output_wafer
+1.8V
+3.3V_NORMAL
IC13000
AZ1117EH-ADJTRG1
IN OUT
R13035
ADJ/GND
1
C13034 C13035
10uF 10uF
10V 10V
TXDBP11_L
TXDBN11_L
TXDBP10_L
TXDBN10_L
TXDBP9_L
TXDBN9_L
TXDBP8_L
TXDBN8_L
GND_Vx1
GND_Vx1_2
BSD-14Y-UD-130-HD
2013.12.17
LGE Internal Use Only