128-bit digital input board with built-in-test (46 pages)
Summary of Contents for VMIC VMICPCI-7755
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VMICPCI-7755 Intel Pentium III Processor with 133MHz Front-Side Bus Product Manual 12090 South Memorial Parkway Huntsville, Alabama 35803-3308, USA (256) 880-0444 (800) 322-3616 Fax: (256) 882-0859 500-657755-000 Rev. E...
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VMIC reserves the right to make any changes, without notice, to this or any of VMIC’s products to improve reliability, performance, function, or design. VMIC does not assume any liability arising out of the application or use of any product or circuit described herein; nor does VMIC convey any license under its patent rights or the rights of others.
Overview Introduction VMIC’s VMICPCI-7755 is a full featured Pentium III compatible computer in a single-slot, passively cooled, Eurocard form factor that utilizes the advanced technology of Intel’s 815E chipset running at a front-side bus rate of 133 MHz. The VMICPCI-7755 is compliant with the CompactPCI Specification Rev. 2.1 and features...
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VMICPCI-7755 is capable of executing many of today’s embedded operating systems such as VxWorks, QNX, Solaris, LynxOS and Microsoft’s embedded Windows NT. The embedded features of the VMICPCI-7755 are described in Chapter 3 of this manual. The VMICPCI-7755 is suitable for use in applications ranging from...
Intel 815E Chipset Intel 815E Chipset The VMICPCI-7755 incorporates the latest Intel chipset technology, the 815E. This chipset departs from previous generation devices by utilizing a new Advanced Hub Architecture (AHA). The AHA allows for increased system performance by separating many high-bandwidth I/O accesses (like IDE or USB devices) from PCI accesses, relieving bottlenecks on the PCI bus.
Chapter 1 - Installation and Setup describes unpacking, inspection, hardware jumper settings, connector definitions, installation, system setup and operation of the VMICPCI-7755. Chapter 2 - Standard Features describes the unit design in terms of the standard PC memory and I/O maps, along with the standard interrupt architecture.
Intel 815 Chipset Family: 82815 Graphics and Memory Controller Hub (GMCH) June 2000, Order Number 290687-001 Intel 82801 BA I/O Controller Hub 2 (ICH2) June 2000, Order Number 290687-001 Intel 21154 Embedded PCI-to-PCI Bridge for VMIC’s CompactPCI CPU 500-000210-000 VMIC 12090 South Memorial Pkwy...
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Wakefield, MA 01880 (617) 224-1100 (617) 224-1239 (FAX) www.picmg.org The following is useful information related to remote Ethernet booting of the VMICPCI-7755: Microsoft Windows NT Server Resource Kit Microsoft Corporation ISBN: 1-57231-344-7 www.microsoft.com The following is useful information related to the operation of the I...
Failure to comply with these precautions or with specific warnings elsewhere in this manual violates safety standards of design, manufacture and intended use of this product. VMIC assumes no liability for the customer’s failure to comply with these requirements. Ground the System To minimize shock hazard, the chassis and system cabinet must be connected to an electrical ground.
Warnings, Cautions and Notes Warnings, Cautions and Notes STOP informs the operator that a practice or procedure should not be performed. Actions could result in injury or death to personnel, or could result in damage to or destruction of part or all of the system. WARNING denotes a hazard.
All claims arising from shipping damage should be filed with the carrier and a complete report sent to VMIC Customer Service along with a request for advice concerning the disposition of the damaged item(s).
CPU are illustrated in Figure 1-1 on page 27. The definitions of the CPU board jumpers and connectors are included in Table 1-1 through Table 1-4. Please note that the VMICPCI-7755 offers two PMC sites designated PMC #1 and PMC #2 as shown in Figure 1-1 on page 27.
VMICPCI-7755 Product Manual Table 1-1 CPU Board Connectors Connector Function Mouse/Keyboard Ethernet USB, COM1, IDE COM2, Floppy Video E30, E36, E40 Factory Reserved Do Not Use C Header J8, J10, J11 PMC Slot 1 J12, J14, J15 PMC Slot 2...
50mA 75mA The VMICPCI-7755 provides power to the two PMC sites in accordance with the PMC specification. The maximum current provided on the +5V supply is 1.5A per PMC site. The maximum current provided on the +3.3V supply is 1.5A per PMC site.
The following steps describe the VMIC-recommended method for installation and powerup of the VMICPCI-7755: 1. If a PMC module is to be used, connect it to the VMICPCI-7755 prior to board installation (as shown in Figure 1-2 on page 32). Refer to the Product Manual for the PMC module for configuration and setup.
Configuration’. The CMOS configuration controls many details concerning the behavior of the hardware from the moment power is applied. The VMICPCI-7755 is shipped from the factory with hard drive type configuration set to AUTO in the CMOS. Details of the VMICPCI-7755 BIOS setup program are included in Appendix C.
The VMICPCI-7755 provides front-panel access for both PMC expansion sites, the VGA connector, the 10/100 Ethernet connector, the manual reset switch, a mouse and keyboard and the status LEDs. A drawing of the VMICPCI-7755 front-panel is shown in Figure 1-3. The front-panel connectors and indicators are labeled as follows: •...
VMICPCI-7755 Product Manual LED Definition PMC 1 Switch Reset - Allows the system to be reset from the front panel. LED 1 System - Indicates BIOS Boot is in progress. When LED is off, CPU has finished POST and is ready, (Red LED).
Front/Rear Panel Connectors In addition, the front-panel LEDs are used to indicate various modes of operational status that can occur with the VMICPCI-7755. The table below is a summary of these indications. Table 1-4 Status Indications State Indication Board is in Reset “LAN 10BaseT/100BaseT”...
Video Graphics Adapter ..........50 Introduction The VMICPCI-7755 is an Intel Pentium III processor-based single board computer compatible with modern industry standard desktop systems. The VMICPCI-7755 therefore retains industry standard memory and I/O maps along with a standard interrupt architecture.
Windows NT 4.0 service pack level 3. It is recommended that an emergency repair disk be kept up-to-date and easily accessible. The VMICPCI-7755 includes 32 Kbyte of non-volatile SRAM which can be accessed by the CPU at any time, and is used to store system data that must not be lost during power-off conditions.
I/O Port Map I/O Port Map Like a desktop system, the VMICPCI-7755 includes special input/output instructions that access I/O peripherals residing in I/O addressing space (separate and distinct from memory addressing space). Locations in I/O address space are referred to as ports.
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$500 - CFF 2048 Reserved * While these I/O ports are reserved for the listed functions, they are not implemented on the VMICPCI-7755. They are listed here to make the user aware of the standard PC usage of these ports.
The interrupt number in HEX and decimal are also defined for real and protected mode in Table 2-3 on page 42. The interrupt hardware implementation on the VMICPCI-7755 is standard for computers built around the PC architecture, which evolved from the IBM PC/XT. In the IBM PC/XT computers, only eight interrupt request lines exist, numbered from IRQ0 to IRQ7 at the PIC.
VMICPCI-7755 Product Manual Table 2-2 PC Hardware Interrupt Line Assignments (Continued) AT FUNCTION COMMENTS Mouse Math Coprocessor AT Hard Drive Flash Drive Table 2-3 PC Interrupt Vector Table INTERRUPT NO. REAL MODE PROTECTED MODE LINE Divide Error Same as Real Mode...
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Interrupts Table 2-3 PC Interrupt Vector Table (Continued) INTERRUPT NO. REAL MODE PROTECTED MODE LINE BIOS Keyboard I/O Same as Real Mode BIOS Printer I/O Same as Real Mode ROM BASIC Entry Point Same as Real Mode Bootstrap Loader Same as Real Mode Time of Day Same as Real Mode Control/Break Handler...
For a single function device, only INTA# may be used while the other three interrupt lines have no meaning. Figure 2-1 on page 46 depicts the VMICPCI-7755 interrupt logic pertaining to CompactPCI operations and the PMC site.
Interrupts The PCI-to-PCI Bridge has the capability of generating a Non-Maskable Interrupt (NMI) via the PCI SERR# line. Table 2-5 describes the register bits that are used by the NMI. The SERR interrupt is routed through logic back to the NMI input line on the CPU.
Integrated Peripherals The VMICPCI-7755 incorporates a National Semiconductor Super I/O (SIO) chip. The SIO provides the VMICPCI-7755 with a standard floppy drive controller, two 16550 UART-compatible serial ports keyboard and mouse ports, and general purpose I/O for system monitoring functions. The floppy and serial port signals are available via the CompactPCI backplane connectors and can be accessed with the appropriate transition utility board.
Ethernet Controller Ethernet Controller The network capability is provided by the Intel 82559ER Ethernet Controller. This Ethernet controller is PCI bus based and is software configurable. The VMICPCI-7755 supports 10BaseT and 100BaseTx Ethernet. 10BaseT A network based on the 10BaseT standard uses unshielded twisted-pair cables, providing an economical solution to networking by allowing the use of existing telephone wiring and connectors.
VMICPCI-7755 Product Manual Video Graphics Adapter The SVGA port on the VMICPCI-7755 is controlled by the Intel Graphic and Memory Controller Hub (GMCH) chip with 4 Mbyte video DRAM. The GMCH is hardware and BIOS compatible with the industry EGA and SVGA standards supporting both VESA high-resolution and extended video modes.
Watchdog Timer for synchronizing and controlling multiple events in embedded applications. The VMICPCI-7755 also provides a bootable Flash Disk system and 32 Kbyte of non-volatile SRAM. Also, the VMICPCI-7755 supports an embedded intelligent CompactPCI bridge to allow compatibility with the most demanding CompactPCI applications.
The VMICPCI-7755 incorporates a PCI peripheral device that performs PCI bridging functions for embedded and intelligent I/O applications. The PCI device acts as a gateway to an intelligent subsystem. It allows the local VMICPCI-7755 processor to configure and control the on-board local subsystem independent from the CompactPCI bus host processor.
C bus with a single pair of pull-up resisters located on the system controller, backplane or any other connected system device. The controller can issue interrupts to the VMICPCI-7755 when handshaking on the C-bus. When the I C-bus controller drives the interrupt active, software must service and then clear the interrupt.
The “Device ID” field indicates that the device is for CompactPCI products (65) and indicates the supported embedded feature set. The “Vender ID” and “Subsystem Vendor ID” fields indicate VMIC’s PICMG assigned Vender ID (114A). The “Subsystem ID” field indicates the model number of the product (7755).
Timers Timers General The VMICPCI-7755 provides four user-programmable timers (two 16-bit and two 32-bit) which are dedicated completely to user applications and are not required for any standard system function. Each timer is clocked by independent generators with selectable rates of 2MHz, 1MHz, 500kHz and 250kHz. Each timer may be independently enabled and each is capable of generating a system interrupt on timeout.
VMICPCI-7755 Product Manual Each timer has an independently selectable clock source which is selected by the bit pattern in the “Timer x Clock Select” field as follows: Clock Rate 2MHz 1MHz 500kHz 250kHz Each timer can be independently enabled by writing a “1” to the appropriate “Timer x Enable”...
Timers result, it is not possible to capture the values of all four timers at a give instance in time. However, by setting this bit to “1”, all four timer outputs will be latched only on reads to the Timer 1 & 2 Current Count Register (TMRCCR12). Therefore, to capture the current count of all four timers at the same time, perform a read to the TMRCCR12 first (with a 32-bit read), followed by a read to TMRCCR3 and TMRCCR4.
VMICPCI-7755 Product Manual Timer 4 Load Count Register (TMRLCR4) Timer 4 is 32-bits wide and obtains its load count from the Timer 4 Load Count Register (TMRLCR4), located at offset 0x18 from the address in BAR1. The mapping of bits in this register are as follows:...
Timers When this field is read, the current count value is latched and returned. There are two modes that determine how the count is latched depending on the setting of the “Read Latch Select” bit in the WDT Control Status Register (CSR2). See the CSR2 register description for more information on these two modes.
VMICPCI-7755 Product Manual Timer 4 IRQ Clear (T4IC) The Timer 4 IRQ Clear (T4IC) register is used to clear an interrupt caused by Timer 4. Writing to this register, located at offset 0x3C from the address in BAR1, causes the interrupt from Timer 4 to be cleared.
Watchdog Timer Watchdog Timer General The VMICPCI-7755 provides a programmable Watchdog Timer (WDT) which can be used to reset the system if software integrity fails. WDT Control Status Register (WCSR) The WDT is controlled and monitored by the WDT Control Status Register (WCSR) which is located at offset 0x08 from the address in BAR1.
VMICPCI-7755 Product Manual The “WDT Enable” bit is used to enable the Watchdog Timer function. This bit must be set to “1” in order for the Watchdog Timer to function. Note that since all registers default to zero after reset, the Watchdog Timer is always disabled after a reset. The Watchdog Timer must be re-enabled by the application software after reset in order for the Watchdog Timer to continue to operate.
NVSRAM NVSRAM The VMICPCI-7755 provides 32KBytes of non-volatile SRAM. This memory is mapped in 32K of address space starting at the address in BAR0. This memory is available at any time and supports byte, short word and long word accesses from the PCI bus.
Flash Disk. Configuration The Flash Disk resides on the VMICPCI-7755 as the secondary IDE bus master device (the secondary IDE bus slave device is not assignable). The default setting in the Phoenix BIOS ‘STANDARD CMOS SETUP’ screen is the ‘AUTO’ setting. In the Phoenix BIOS ‘PERIPHERAL SETUP’...
Following the creation of the partitioning scheme, the partitions can be formatted to contain the desired file system. As discussed earlier, a typical system consists of the VMICPCI-7755 with its resident Flash Disk configured as the Secondary IDE device, a hard drive attached to the Primary IDE interface, and a floppy drive attached to the floppy interface.
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VMICPCI-7755 Product Manual 3. Set Flash Disk Master to “AUTO”. 4. Set boot device to floppy. 5. Boot DOS from the floppy, and verify that the System Configuration Screen shows only the Flash Disk. 6. Run FDISK. 7. Delete all current partitions (any data currently stored in the partitions will be lost).
Remote Ethernet Booting Remote Ethernet Booting The VMICPCI-7755 is capable of booting from a server over a network utilizing Lanworks BootWare BIOS. The BootWare BIOS gives you the ability to remotely boot the VMICPCI-7755 using a variety of network protocols. The Ethernet must be connected through the LAN front panel (RJ-45) connector to boot remotely.
8. Quality of cables and I/O connections If products must be returned, contact VMIC for a Return Material Authorization (RMA) Number. This RMA Number must be obtained prior to any return. VMIC Customer Service is available at: 1-800-240-7782.
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PMC Connector Pinout ..........80 Introduction The VMICPCI-7755 CompactPCI Peripheral SBC has several connectors for its I/O ports. Wherever possible, the VMICPCI-7755 uses connectors and pinouts typical for any desktop PC.
VMICPCI-7755 Product Manual J1 Connector Pinout The VMICPCI-7755 utilitizes a high-density 110-pin, low inductance, and controlled impedance connector. This connector meets the IEC-1076 international standard for CompactPCI connectors. An additional external metal shield is required. The large number of ground pins ensures adequate shielding and grounding for low ground bounce and reliable operation in noisy environments.
J2 Connector Pinout J2 Connector Pinout The VMICPCI-7755 J2 connector is a 2mm “Hard Metric” CompactPCI connector, with 5 rows of 22 pins each. J2 is required for system slot CPUs. An additional external metal shield, labeled row F, is also used. This connector’s controlled impedance minimizes unwanted signal reflections.
VMICPCI-7755 Product Manual J3 Connector Pinout The J3 connector is a 5 row, 19 pins each, 2mm “Hard Metric” CompactPCI connector. An additional external metal shield is also used, labeled row F. Figure A-3 illustrates the J3 connector and the connector pinout. This connector is used to route the I/O signals of the PMC Site #2 and the serial and floppy drive signals to the backplane I/O.
J4 Connector Pinout (Optional) J4 Connector Pinout (Optional) The VMICPCI-7755 utilitizes a high-density 110-pin, low inductance, and controlled impedance connector. This connector meets the IEC-1076 international standard for CompactPCI connectors. An additional external metal shield is required. The large number of ground pins ensures adequate shielding and grounding for low ground bounce and reliable operation in noisy environments.
VMICPCI-7755 Product Manual J5 Connector Pinout The VMICPCI-7755 J5 connector is a 2mm “Hard Metric” CompactPCI connector, with 5 rows of 22 pins each. An additional external metal shield is also used, labeled row F. This connector is used to route the I/O signals of PMC Site #1, and the IDE, serial and USB signals to the backplane I/O.
Ethernet Connector Pinout (J6) Ethernet Connector Pinout (J6) The pinout diagram for the Ethernet 10BaseT and 100BaseTx connector is shown in Figure A-6. ETHERNET CONNECTOR (10BaseT, 100BaseTx) Signal Name Transmit Data Transmit Data Receive Data TX_CT_OUT Transmit Center Tap Out TX_CT_OUT Transmit Center Tap Out Receive Data...
VMICPCI-7755 Product Manual Video Connector Pinout (P3) The video port uses a micro DB9 connector. Figure A-7 illustrates the connector and pinout. Video Connector Direction Function Green Blue Horizontal Sync Vertical Sync DDC Data DDC Clock Ground Figure A-7 Video Connector and Pinout NOTE: An adapter to convert the micro DB9 connector to a standard female high-density DB15 connector is available as an option (order # 360-000168-004).
Ground +5 V Mouse Clock Keyboard Clock Shield Chassis Ground *An adapter cable is included with the VMICPCI-7755 to separate the keyboard and mouse connector. Figure A-8 Keyboard/Mouse Connector and Pinout Table A-1 Keyboard/Mouse Y Splitter Cable Keyboard Mouse Function...
VMICPCI-7755 Product Manual PMC Connector Pinout PMC #1 (J11)/PMC #2 (J15) Connector and Pinout The PCI Mezzanine Card (PMC) carries the same signals as the PCI standard; however, the PMC standard uses a completely different form factor. Tables A-2 through A-5 are the pinouts for the PMC connectors (J8, J10, J11, J12, J14 and J15).
PMC Connector Pinout PMC #1 (J10)/PMC #2 (J14) Connector and Pinout Table A-3 PMC #1 (J10)/PMC #2 (J14) Connector Pinout PMC Connector (J10/J14) PMC Connector (J10/J14) Left Side Right Side Left Side Right Side Name Name Name Name +12 V +5 V TRDY +3.3 V...
VMICPCI-7755 Product Manual PMC #1 (J8) Connector and Pinout Table A-4 PMC #1 J8 Connector Pinout PMC Connector (J8) PMC Connector (J8) Left Side Right Side Left Side Right Side Connected Connected Connected Connected Name Name Name Name J8-1 J5 pin E22...
PMC Connector Pinout PMC #2 (J12) Connector and Pinout Table A-5 PMC #2 J12 Connector Pinout PMC Connector (J12) PMC Connector (J12) Left Side Right Side Left Side Right Side Connected Connected Connected Connected Name Name Name Name J12-1 J3 pin E22 J12-2 J3 pin D22 J12-33...
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Status of PCI Devices Listed in Windows Device Manager ....95 Introduction The VMICPCI-7755 provides high-performance video, Ultra ATA storage device control and Local Area Network (LAN) access by means of on-board PCI-based adapters and associated software drivers.
VMICPCI-7755 Product Manual Using USB Keyboard/Mouse with Microsoft Windows OSs This section applies if either a USB keyboard or USB mouse is connected. It does not apply if a PS/2 keyboard and mouse are used. Windows 98 SE/Windows 2000 The use of a USB keyboard/mouse with an operating system that supports USB devices requires changing the default BIOS settings before and after the installation of Windows 98 SE/2000.
BIOS Setup BIOS Setup To enable/disable Legacy USB Support and/or assign an interrupt to the USB controller, perform the appropriate actions as outlined below: 1. Immediately after the CPU has been powered on or reset, press F2 to enter the ‘Phoenix BIOS Setup Utility’.
VMICPCI-7755 Product Manual Microsoft Windows 98 SE Software Driver Installation 1. Prior to installing Windows 98 SE, ensure the BIOS is set to assign an interrupt to the USB controller. Also ensure ‘Installed OS’ is set to ‘Win98/Win2000’. See ‘BIOS Setup’ on page 87 for guidelines on changing BIOS settings.
Microsoft Windows 98 SE Software Driver Installation Ultra ATA Storage Driver Installation 1. If not already present, insert the ‘Windows Drivers’ CD-ROM. 2. Click ‘Start’, ‘Run’, ‘Browse’. In the ‘Look in’ pull-down selection menu, select the ‘Windows Drivers’ CD-ROM. Double-click on the ‘Win98’ folder. Double-click on the ‘UltraATA’...
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VMICPCI-7755 Product Manual 3. Select ‘PCI Ethernet Controller’ (found under ‘Other devices’) and click ‘Properties’. 4. In the ‘PCI Ethernet Controller Properties’ windows, click on the ‘Driver’ tab. Click ‘Update Driver’. Click ‘Next’ twice. Ensure ‘Floppy disk drives’ is the only location selected and click ‘Next’.
Microsoft Windows NT 4.0 Software Driver Installation Microsoft Windows NT 4.0 Software Driver Installation 1. Follow the normal Windows NT 4.0 installation until the ‘Windows NT Workstation Setup’ window that states ‘Windows NT needs to know how this computer should participate on a network’ is displayed. 2.
VMICPCI-7755 Product Manual 2. If not already present, insert the ‘Windows Drivers’ CD-ROM. Click ‘Start’, ‘Run’, ‘Browse’. In the ‘Look in’ pull-down selection menu, select the ‘Windows Drivers’ CD-ROM. Double-click on the ‘WinNT’ folder. Double-click on the ‘LAN’ folder. Double-click on ‘Makedisk’. Click ‘OK’.
Microsoft Windows 2000 Software Driver Installation Microsoft Windows 2000 Software Driver Installation 1. Prior to installing Windows 2000, ensure the BIOS is set to assign an interrupt to the USB controller. Also ensure ‘Installed O/S’ is set to ‘Win98/Win2000’. See “BIOS Setup”...
VMICPCI-7755 Product Manual 2. Click ‘Start’, ‘Run’, ‘Browse’. In the ‘Look in’ pull-down selection menu, select the ‘Windows Drivers’ CD-ROM. Double-click on the ‘Win2000’ folder. Double-click on the ‘Video’ folder. Double-click on ‘Setup’. Click ‘OK’. 3. At the ‘Intel 810/810E/815/815E/815EM Chipset Graphics Drivers’ window, click ‘Next’.
After installing all of the drivers provided on the Windows Drivers CD-ROM, Device Manager will still indicate that several PCI devices do not have drivers loaded. These devices are the PCI-to-PCI bridge and the VMIC proprietary FPGA. Although these devices are listed as non-functioning by Windows, the hardware is functioning as...
Exit Menu ............111 Introduction The VMICPCI-7755 utilizes the BIOS (Basic Input/Output System) in the same manner as other PC/AT compatible computers. This appendix describes the menus and options associated with the VMICPCI-7755 BIOS.
VMICPCI-7755 Product Manual First Boot The VMICPCI-7755 has a First Boot menu enabling the user to, on a one time basis, select a drive device to boot from. This feature is useful when installing from a bootable disk. For example, when installing Windows NT from a CD, enter the First Boot menu and use the arrows keys to highlight ATAPI CD-ROM Drive.
Main Menu Main Menu The Main menu allows the user to select QuickBoot, set the system clock and calendar, record disk drive parameters, and set selected functions for the keyboard. QurvÃTrÃVvyv H6DI 6qhprq Trp v Qr 7 @v DrÃTrpvsvpÃCry Rvpx7ÃHqr) b@hiyrqd TrÃUvr) b $)#%)!"d 6yyÃurÃrÃ...
PGDN Primary Master/Slave The VMICPCI-7755 is capable of utilizing one IDE hard disk drive on the Primary Master bus. The default setting is Auto. The Primary Slave is assigned to the CD-ROM (if installed). If a setting other than Auto is selected the user must match the settings to the hardware.
Main Menu Secondary Master The Secondary Master is the resident Flash Disk (if installed). The default setting is Auto. Keyboard Features The Keyboard Features allows the user to set several keyboard functions. QurvÃTrÃVvyv H6DI DrÃTrpvsvpÃCry Frih qÃArh r TryrpÃQr Ãhr IGpx) b6d s ÃIGpx FrÃ8yvpx) b9vhiyrqd Frih qÃ6SrrhÃShr) b"rpd...
VMICPCI-7755 Product Manual Keyboard Auto-Repeat Delay (sec) If the Key Click is enabled, this determines the delay before a character starts repeating when a key is held down. The options are: 1/4, 1/2, 3/4 or 1 second. The default is 1/2.
Main Menu Flow Control Enables or disables Flow Control. The options are No Flow Control, XON/XOFF or CTS/RTS. The default is CTS/RTS. Console Connection Indicates whether the console is connected directly to the system, or if a modem is being used to connect. The options are: Direct or Via Modem. The default is Direct. Continue C.R.
Advanced Menu Video Boot Type Select “Onboard Video’ to enable the onboard video controller as the boot display device. Select “Disable Onboard Video’ to disable the onboard video controller. Enable Memory Gap If enabled, turn system RAM off to free address space for use with an option card. Either a 128KB conventional memory gap, starting at 512KB, or a 1MB extended memory gap, starting at 15MB, will be created in the system RAM.
Advanced Menu Local Bus IDE Adapter This enables or disables the intergrated local bus IDE adapter. The options are: Disabled, Primary, Secondary or Both. The default is Both. Assign Interrupt To USB Enabled assigns an interrupt to the USB. The default is Enabled. Legacy USB Support Enabled supports a legacy keyboard and mouse on the USB.
Power Power This screen, selected from the Main screen, allows the user to configure power saving options on the VMICPCI-7755. QurvÃTrÃVvyv QPX@S Hhv 6qhprq Trp v 7 @v DrÃTrpvsvpÃCry 8QVÃUu yvtÃ9ÃUu ruyq b9vhiyrqd 8QVÃUu yvtÃihpxÃur rv b 8d HhvÃQr Ãhvt Uu yvtÃÈ b$Èd pr rÃurÃt rhr hÃsÃrÃr Qr ÃThvt) b9vhiyrqd HhvÃQr s hpr...
VMICPCI-7755 Product Manual Boot Menu The Boot priority is determined by the stack order, with the top having the highest priority and the bottom the least. The order can be modified by highlighting a device and, using the <+> or <-> keys, moving it to the desired order in the stack. A device can be boot disabled by highlighting the particular device and pressing <Shift 1>.
Exit Menu Exit Menu The Exit menu allows the user to exit the BIOS program, while either saving or discarding any changes. This menu also allows the user to restore the BIOS defaults if desired. QurvÃTrÃVvyv @v Hhv 6qhprq Qr 7...
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BIOS Features Setup ..........116 Introduction The VMICPCI-7755 includes a LANWorks option which allows the VMICPCI-7755 to be booted from a network. This appendix describes the procedures to enable this...
First Boot menu. Selecting “Managed PC Boot Agent (MBA)” to boot from the LAN in this screen applies to the current boot only, at the next re-boot the VMICPCI-7755 will revert back to the setting in the Boot menu.
VMICPCI-7755 Product Manual BIOS Features Setup After the Managed PC Boot Agent has been enabled, there are several boot options available to the user. These options are RPL (default), TCP/IP, Netware and PXE. The screens below show the defaults for each boot method.
CPU card (for example, the VMICPCI-7756) and a system controller CPU (for example, the VMICPCI-7755). Directory \fpga This directory contains code used to test the functions of the VMIC-designed FPGA such as timers, SRAM controller and Watchdog Timer.
This directory contains memory and PCI access routines used by many of the sample code applications. Directory \vlm This directory contains code that demonstrates how to read the voltages from the analog inputs of the super I/O component on the VMICPCI-7755.
Appendix Serial ROM for the 21154 Introduction The VMICPCI-7755 is shipped with a default configuration for the SROM used to load the 21154 Embedded PCI bridge chip at power up and reset. The contents of the SROM are as follows: VMICPCI-7755 21154 SROM Code ;Preload enable (bit 7 set for preload enable)
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VMICPCI-7755 Product Manual ;Secondary Class Code :0D 00 :0E 80 :0F 06 ;Secondary Min GNT, Max Lat :10 00 :11 00 ;Downstream Mem 0 - CSRs only (Set a 4K window size) FFFFF000 :12 00 :13 F0 :14 FF :15 FF ;Downstream Mem 1 or I/O (Set 256 byte I/O window size) FFFFFF01...
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;Expansion ROM (Set 1 MB expansion ROM size) :26 01 :27 F0 ;Upstream Mem 0 or I/O (Set 256 byte I/O window size) FFFFFF01 :28 01 :29 FF :2A FF :2B FF ;Upstream Mem 1 (Set 256 MB memory window size) F0000000 :2C 00 :2D 00 :2E 00...
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VMICPCI-7755 Product Manual :3C 00 :3D 00 :3E 00 :3F 00 :40 00 :41 00 :42 00 Upstream or Outbound means going out to the CompactPCI backplane from the local processor, Downstream or Inbound means coming into the local CPU bus from the CompactPCI backplane.
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VMIVME-7755 Product Manual Serial I/O (COM1,2,3 & 4) SERR interrupt System BIOS Setup Utility unpacking procedures vector interrupt table 89, 91, 93 video driver installation Windows 2000 Installation Windows 98 SE Installation Windows NT 4.0...
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