Schematic Diagrams - Yamaha KMA-1080 Service Manual

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SCHEMATIC DIAGRAMS

1 DSP
DSP (1)
2 0
0
5.0
5.0
1
0
0
0
0
W1 5.0 DSP
0 0
0 MICROPROCESSOR
0
5.0
5.0
0
CB1
0 0
0
5.1
0 0
0 0
0 0 * No replacement part available.
0
0
0
0
5.1 0
3
0 0
5.1
0
0
5.1
CB5
0
0
0
5.1 0
0
5.0
0
0 5.0
0
0
5.1
5.1
5.0
4
5
0
5.3
0
5.1
4.5
0
5.1
5.1
0
CB2
6
MUSIC IN (L ch) MIC IN 0
0
0 IC3
0
0
0
0
0
0
0
11.8
0
0
0
7
-11.5
0
CB3
MIC OUT (L ch)
MUSIC OUT (L ch) 0
0
0
0
0
0
0
8
0
0
0
8.6
8.6
0
0
0
-7.7 8.6
0
0 8.6
-7.7
0
0
9
IC1: TC4052BF IC3–9:
Analog multiplexer/demultiplexer
UPC4570G2-E1-A
Dual operational amplifier
VDD
16
13 X-COMMON OUT 1
1
I/O c O/I 12 0X
–IN 1 2
14 1X + –
I/O c O/I
A 10
15 +IN
I/O c O/I 2X 1 3
10
I/O c O/I 11 3X
B 9 –V 4
CC
1 0Y
I/O c O/I
5
I/O c O/I 1Y
INH 6
I/O c O/I 2 2Y
I/O c O/I 4 3Y
3
Y-COMMON
8 7
VSS VEE
D E F
IC10
DRAM
5.0
3.4
3.4
3.4
3.4
5.0
3.4
5.0
3.4
5.0
3.4
0
3.4
5.0
5.0
5.0
4.7
5.0
4.0
5.0
5.0
2.5
5.0
2.5
0
2.5
0
2.5
0
5.0
IC2 5.0
0
5.0
0
2.8
0
2.8
0
2.8
0
2.8
0
5.0
0
3.0
0
0 3.0
3.0
0
3.0
0
5.0
5.0
4.7
1.5
4.0
5.0
5.1 2.5
2.5
2.5
2.5
5.0
2
5.1
IC11 IC11 IC11
0 2.6
5.0 2.4 2.6 2.5
0
IC13 IC14
IC12
11.8
0
0
0 IC3
3.0
11.8
IC5 3.0 3.0
3.0 3.0 IC5
3.0
-11.5
3.0
3.0 3.0
11.8 11.8
3.0 IC7
0 IC6
3.0
0
3.0
0 IC4
-11.5
0
0
0 IC4
11.8
3.0
-11.5
3.0
IC7
3.0
3.0 3.0
IC6
3.0
-11.5
IC10: PQ033EZ01ZP
IC11: TC7WU04U
Voltage regulator Triple inverter
DC input (Vin) 1 3 DC output (Vo) 1A 1 8 V CC
+V CC
8
IC 3Y 2 7 1Y
OUT 2 ON/OFF control (Vc)
7 2
+ – 5
GND 2A 3 6 3A
-IN
6 2
OUTPUTS
5 +IN
2
GND 4 5 2Y
G H
5.0
0
3.4
3.4
3.4 3.4
3.4
3.4
3.4
3.4
3.4
0
3.4
3.4
3.4
3.4
3.4
3.4
0
3.4
3.4
3.4
4.1
3.4
4.1 DIGITAL SIGNAL
3.4
4.0
3.4
PROCESSOR
~
3.4
~
3.4
~
3.4
2.5
5.0
2.5
IC17
0
0
2.5
2.5
0
2.5
3.4
2.5
3.4
2.5
3.4
2.5
* No replacement part available.
3.4
~
0
~
3.4
~
3.4
3.4
0
3.4
3.3
4.1 3
4.1
4.0
~
~
4.0
~
4.1
2.5
2.5 4.7
0
4.0
5.0
CODEC
2.5
MIC IN 3.1
0
3.0 1.8
IC8
3.0 3.1 0
3.0 1.8
3.0 0
5.1
5.1 5.0
0 5.0
3.0
5.1 0
5.0 5.0
5.1 3.0
2.5 5.0
2.6 0
3.0 0 2.6 5.0
1.7 0
0
1.8 0
3.0 0 IC8
0 0
0
0 0
5.1
MUSIC IN (L ch) MUSIC OUT (L ch)
3.0
5.1 3.0
CODEC
3.0 0
2.5
2.5
3.0
3.0 2.5
0
3.0 2.5
0
IC9
3.0 2.5 0
3.0 0
5.1 5.0
5.1 0 5.0
5.1 0
5.0 5.0
3.0 2.5 5.0
2.6 0
5.1 3.0
2.6 5.0
1.7 0
3.0 0 1.8 0
0
IC9
0
3.0
-11.5
0
IC12: TC74VHC393FT IC13: TC74VHC175FT IC14: SN74AHC74PWR
Dual 4-bit binary counters Quad D-type flip flop with clear Dual positive-edge-triggered D-type flip-flop
V 4Q 4Q 4D 3D 3Q 3Q CLOCK
CC
1A 1 14 V 16 15 14 13 12 11 10 9 PRE
CC
CLK
CLEAR 1 2 13 2A
Q Q Q Q
CLR CLR
CK CK
D D
1OA 3 QA 12 CLEAR 2
1OB 4 QB QA 11 2OA
D D
A CK CK
CLR CLR
1OC 5 QC QB 10 2OB Q Q Q Q
A OUTPUTS
D
1OD 6 QD QC 9 2OC 1 2 3 4 5 6 7 8
CLEAR 1Q 1Q 1D 2D 2Q 2Q GND
GND 7 8 2OD
QD
CLR
I J K
3.3
5.0
PF0/WAIT-A/OE-A*/ADTRG0-B/SCS0-C
0
0
0
0
0
0 MUSIC DA P85/PO5-B/TIOCB4-B/TMO1-B/SCK3
0 P83/PO3-B/TIOCD3-B/TMCI1-B/RxD3
P81/PO1-B/TIOCB3-B/TMRI1-B/TxD3
1.8
1.8
5.0
0
MIC DA
5.0
5.0
5.0
5.0
MUSIC AD
5.0
5.0
1.7
1.7
0
5.0
5.0
MIC AD
5.0
5.0
5.0
5.0
5.0
5.0
3.3
DSP (2)
MIC OUT (L ch) 0
0
0
W1
11.8
0
0
-11.5
11.8
0
IC15, 16: AK4528VF
24-bit 96 kHz audio CODEC
VCON 1
AINR+
2
AINR- 3
AINL+ 4
AINL-
5
VREF 6
AGND 7
VA 8
0 P/S 9
MCLK 10
LRCK 11
BICK 12
SDTO 13
SDTI 14
Point q Pin 81 of IC2
1CLR VCC
1 14
C 1D 2 13 2CLR
C
1CLK 3 12 2D
C
Q 1PRE 4 11 2CLK
TG
1Q 5 10 2PRE
C C C
1Q 6 9 2Q
C
GND 7 8 2Q
TG TG TG
Q
C C C
L M N
KMA-1080/KMA-980
IC2: R4F24245NFPV
MCU
Port D Port E
MD2
MD1
PA7/A23/CS7/IRQ7-A/SSO0-B
MD0
Internal address bus PA6/A22/IRQ6-A/SSI0-B
EXTAL
ETAL Internal data bus PA5/A21/IRQ5-A/SSCK0-B
EMLE PA4/A20/IRQ4-A/SCS0-B
System
/STBY PA3/A19/SCK4-B
clock
/RES PA2/A18/RxD4-B
PLL
/WDTOVF PA1/A17/TxD4-B
/NMI H8S/2600 CPU
PA0/A16
Clock
PB7/A15TIOCB8/TCLKH
pulse
PB6/A14/TIOCA8
generator
PB5/A13/TIOCB7/TCLKG
PB4/A12/TIOCA7
PF7/φ
PB3/A11/TCOCD6/TCLKF
DTC
PF6/AS/AH Interrupt controller
PB2/A10/TCOCC6/TCLKE
PF5/RD
PB1/A9/TCOCB6
PF4/HER
PB0/A8/TCOCA6
PF3/LWR/SSO0-C
DMAC
PF2/CS6/LCAS*/SSI0-C PC7/A7TIOCB11
ROM
PC6/A6/TIOCA11
PF1/CS5/UCAS*/SSCK0-C
(Flash memory)
PC5/A5/TIOCB10
PC4/A4/TIOCA10
PC3/A3/TCOCD9
PG6/BREQ-A
PG5/BACK-A PC2/A2/TCOCC9
WDT
PG4/BREQO-A/CS4 PC1/A1/TCOCB9
PG3/CS3/RAS3* PC0/A0/TCOCA9
PG2/CS2/RAS2* RAM SCI x 5 channels
PG1/CS1 P35/OE-B*/SCK1/SCL0
PG0/CS0
P34/SCK0/SCK4-A/SDA0
IIC2 x 4 channels P33/RxD1/SCL1
P32/RxD0/IrRxD/SDA1
P31/TxD1
TPU x 12 channels 8-bit D/A converter P30/TxD0/IrTxD
(Two units) (2 channels)
10-bit A/D converter
(Total of 10 channels for two units)
P53/IRQ3-A/ADTRG0-A
P52/BACK-B/IRQ2-A/PO4-B/TIOCA4-B/TMO0-B/SCK2
PPG
SSU
P51/BREQ-B/IRQ1-A/PO2-B/TIOCC3-B/TMCI0-B/RxD2/SCL3
P50/BREQO-B/IRQ0-A/PO0-B/TIOCA3-B/TMRI0-B/TxD2/SDA3
TMR x 2 channels
Peripheral data bus
Peripheral address bus
Port 1 Port 2 Port 4 Port 9
IC17: YSS910C-VZ
DSP6 (Digital Signal Processor)
CPU CLOCK
INTERFACE GENERATOR
CTL-BUS
32
DA31~00
320 STEP
DSP 18
I/O BUS 320 STEP
EXTERNAL A17~00
CONTROL DEQ
320CH RAM
/WE
INTERPOLATER INTERFACE
/OE
I/O-BUS
SERIAL SERIAL
INPUT OUTPUT PARALLEL MOD
FUNCTION
32CH INPUT 32CH OUTPUT IN/OUT 8 BIT/16CH
BUFFER BUFFER
IC19, 20: MSM5416258B-28J3DR
256K-word X 16bit EDO DRAM
OE WE
27 13
Timing
RAS 14
Generator
I/O
Controller
LCAS 29
Output
UCAS 28 8 8
I/O Buffers
Controller
DQ1~DQ7
Column
Address Column Decoders Input
9 9 8 8
Buffers
Buffers
I/O
Internal Sense Amplifiers
Refresh 16 16
A0~A8 Address Selector
Control Clock
Counter
Input
8
8
Buffers
Row
Row
9 Address 9
Word Memory DQ8~DQ15
Deco-
Buffers Drivers Cells
ders
Output
8 8
Buffers
VCC 20
On Chip
VBB Generator
VSS 21
VD
VT
AINL+
DGND
28 AOUTR+
AINL-
AOUTR- PDN
27
ADC
26 AOUTL+ AINR+ HPF
25 AOUTL-
AINR-
DGND
24
LRCK
23 VD
Audio I/F
22 VT BICK
VCOM
Controller
21 DEM1
SDTO
20 DEM0
AOUTL+
19 PDN SDTI
18 DFS AOUTL- DATT
DAC
17 CSN(DIF)
AOUTR+ SMUTE
16 CCLK(CKS1)
15 CDTI(CKS0)
AOUTR-
DEM0
VREF
Control Register I/F Clock Divider DEM1
VA
AGND
P/S CSN CCLK CDTI MCLK DFS
(DIF) (CKS1) (CKS0 )
Point w Pin 6 of IC11 Point e Pin 3 of IC17
* All voltages are measured with a 10MΩ/V DC electronic volt meter.
* Components having special characteristics are marked Z and must be replaced
with parts having specifications equal to those originally installed.
* Schematic diagram is subject to change without notice.
31