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Philips Semiconductors
CMOS digital decoding IC with RAM for
Compact Disc
PWM
, 4-
MODE
LINE
Using two extra outputs from the Versatile Pins Interface, it is possible to use the SAA7345 with a 4-input motor bridge.
Figure 19 shows the timing and Fig.20 a typical application diagram.
MOTO1
MOTO2
V4
V5
CDV
MODE
In the CDV motor mode, the FIFO position will be put in pulse-width modulated form on the MOTO1 pin (carrier frequency
300 Hz) and the PLL frequency signal will be put in pulse-density modulated form on the MOTO2 pin (carrier frequency
4.23 MHz). The integrated motor servo is disabled in this mode.
Remark:
The PWM signal on MOTO1 corresponds to a total memory space of 20 frames, therefore the nominal FIFO position
(half-full) will result in a PWM output of 60%.
1998 Feb 16
t
= 45 s
rep
Accelerate
Fig.19 Motor 4-line PWM mode timing.
V4
MOTO1
Fig.20 Motor 4-line PWM mode application diagram.
t
240 ns
dead
t
= 240 ns
ovl
+
M
10
100 nF
V SS
22
Product specification
MGA367 - 1
Brake
V5
MOTO2
MGA364 - 2
SAA7345
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