SDA
WP
SCL
A0
A1
A2
Copyright 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Start/Stop
Logic
Slave Address
Word Address
Comparator
Figure 2-1. S524A40X10/40X20/40X40 Block Diagram
Control Logic
Pointer
decoder
D
and ACK
OUT
- 42 -
HV Generation
Timing Control
EEPROM
Cell Array
Row
128 x 8 bits
256 x 8 bits
512 x 8 bits
Column Decoder
Data Register
LGE Internal Use Only