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3. TECHNICAL BRIEF
3.13 Multimedia Chip Interface
3.13.1 Host Interface
The HOST interface connects the ZR345X and the host processor (a handset baseband chip) in two
optional modes:
• On the host memory bus.
• On the host LCD bus.
[ Block Diagram ]
LGE Internal Use Only
VREG_MSMP_2.7V
R305
MMP_CS_N
10K
EBI2_OE_N
EBI2_WE_N
MMP_INT_N
EBI2_ADDR[11]
EBI2_ADDR[12]
EBI2_ADDR[13]
EBI2_ADDR[14]
EBI2_DATA[0]
EBI2_DATA[1]
EBI2_DATA[2]
EBI2_DATA[3]
EBI2_DATA[4]
EBI2_DATA[5]
EBI2_DATA[6]
EBI2_DATA[7]
EBI2_DATA[8]
EBI2_DATA[9]
EBI2_DATA[10]
EBI2_DATA[11]
EBI2_DATA[12]
EBI2_DATA[13]
EBI2_DATA[14]
EBI2_DATA[15]
EBI2_DATA[0:15]
[ Schematics ]
Copyright © 2007 LG Electronics. Inc. All right reserved.
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R306
0
B8
HCS0N
A8
0603
HCS1N
TP300
B7
HRDN
TP301
B9
HWRN
A7
HGINTN
A10
TP302
HA11
A9
HA12
C8
HA13
C7
HA14
D12
HD0
C10
HD1
C12
HD2
C13
HD3
C14
HD4
B14
HD5
C11
HD6
B13
HD7
A14
HD8
A13
HD9
B12
HD10
A12
HD11
B11
HD12
A11
HD13
C9
HD14
B10
HD15
L13
NCSN
M13
NALE
L12
Only for training and service purposes
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