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3. TECHNICAL BRIEF
(2) Transmitter part
The transmit (Tx) section consists of an I/Q baseband upconverter, and offset
phase-locked loop (OPLL) and two output buffers that can drive external
power amplifiers (PA), one for the GSM 850 (824-849 MHz) and E-GSM 900
(880-915 MHz) bands and one for the DCS 1800 (1710-1785 MHz) and PCS
1900 (1850-1910MHz) bands.
A. IF Modulator
The baseband converter(BBC) within the GSM chipset generates I and Q baseband
signals for the Transmit vector modulator. The modulator provides more than 40dBc
of carrier and unwanted sideband rejection and produces a GMSK modulated
signal.The baseband software is able to cancel out differential DC offsets in the I/Q
baseband signals caused by imperfections in the D/A converters.
The Tx-Modulator implements a quadrature modulator. A quadrature mixer upcon-
verts the differential in-phase (TXIP, TXIN) and quadrature (TXQP, TXQN) signals
with the IFLO to generate a SSB IF signal that is filtered and used as the reference
input to the OPLL.
The IFLO frequency is generated between 766 and 896 MHz and internally divided
by 2 to generate the quadrature LO signals for the quadrature modulator, resulting
in an IF between 383 and 448 MHz. For the E-GSM 900 band, two different IFLO
frequencies are required for spur management. Therefore, the IF PLL must be
programmed per channel in the E-GSM 900 band.
B. OPLL
The OPLL consists of a feedback mixer, a phase detector, a loop filter, and a fully
integrated TXVCO. The TXVCO is centered between the DCS 1800 and PCS 1900
bands, and its output is divided by 2 for the GSM 850 and E-GSM 900 bands. The
RFLO frequency is generated between 1272 and 1483 MHz. To allow a single VCO
to be used for the RFLO, high-side injection is used for the GSM 850 and E-GSM
900 bands, and low-side injection is used for the DCS 1800 and PCS 1900 bands.
The I and Q signals are automatically swapped when switching bands. Additionally,
the SWAP bit in register 03h can be used to manually exchange the I and Q signals.
Low-pass filters before the OPLL phase detector reduce the harmonic content of the
quadrature modulator and feedback mixer outputs. The cutoff frequency of the filters
is programmable with the FIF[3:0] bits in register 04h (Figure 3-3), and should be set
to the recommended settings detailed in the register description.
PDRB
REG
RFOG
REG
RFOD
÷ 1,2
TXBAND[1:0]
Figure 3-3 Block Diagram of Transmitter part of SI4205
PDIB
FIF[3:0]
- 14 -
÷ 2
BBG[1:0]
SWAP
TXIP
I
TXIN
TXQP
Q
TXQN
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