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EN 128
9.
EM1.1A AA
9.6
Video: HD Jack Interface (Diagram N)
The Jack High Definition module covers the following functions:
1. RGB input/output selection.
2. Matrix circuit to convert YPbPr to RGB.
3. Sync slicer for YPbPr sync on Y, RGB sync on Green.
4. Sync selection.
5. Control Function.
6. Audio feed-through of signal source.
SND_R_in
SND_L_in
ATSC
YPbPr/
RGB_ATSC
MATRIX
RGB
RGB_PAL
PAL
MATRIX
Y/G
HEF 4052
H-770-2
2fH
1,2
Sync slicer
H-770-3
H_in
3
1,2
V-770
V_in
3
I2C
I/O Expander: M62320
Figure 9-8 Source selection
9.6.1
RGB in/output selection
The module has two video inputs and one RGB output (going
into the set).
The inputs can also handle 1080i-signals and 480p-signals
(both in RGB format and YPbPr format).
(This selection circuitry is also needed to cope with the various
formats of the non-standardized HD set top box business.)
Video-input (3 cinches, reference number 1993-A-B-C):
•
YPbPr with sync on Y.
•
RGB with sync on green
Note: cinch-inputs are normally used for YPbPr input.
Video-input (D-sub, reference number 1990):
•
YPbPr with sync on Y
Note: D-sub input is normally used for RGB-inputs only.
•
RGB with sync on Green.
•
RGB with separate H and V Sync (called VGA in 480p).
RGB output:
This RGB output of the board is signaled into the set (HOP-
section of SSB, diagram B4).
9.6.2
Matrix
The YPbPr-signal format is converted to RGB via the matrix
function. In 480p-format, the PAL matrix is used, otherwise the
ATSC matrix is used.
The matrix choice is made with TDA8601 (SW1, 7107).
This switch is controlled via the command IO-1 (called MATRIX
SELECT in the figure).
9.6.3
Sync Slicer
The sync slicer extracts the horizontal and vertical
synchronization signals for the HOP (in the set):
•
From the 3-level sync pulses Y of the 1080i YPbPr.
•
From the 3-level sync pulses Green of the 1080i RGB.
•
From the normal sync pulses of the 480p signal.
Circuit Descriptions, List of Abbreviations, and IC Data Sheets
SND_R_out
SND_L_out
A
TDA8601
TDA8601
B
RGB output
A,B
FBL
SW1
SW2
FBL
I01
I02
I03
H_out
V_out
SW-3
I04 I05 I06
CL 16532043_024.eps
050601
Explanation of 3-level sync shown in picture:
+ 350
+ 300
P'
,P'
0
B
R
- 300
- 350
+ 700
+ 300
Y',R',G',B'
0
- 300
0
H
Figure 9-9 3-level sync signal
Example of a 2-level sync pulse: CVBS-signal with two levels
of sync (-300 mV, 0 mV).
Example of a 3-level sync pulse: ATSC-signal with three levels
of sync (-300 mV, 0 mV, +300 mV).
The amplitudes of the Y, R, G, and B signals are 700 mV;
amplitudes of the Pb and Pr signals are 350 mV.
9.6.4
Sync Selection
If the synchronization is derived from Y or Green, the H and V
sync from the sync-slicer must be selected.
•
When YPbPr-signal or RGB-signal is 480p-format: sync
signals will be V-770 and H-770-2 sync.
•
When YPbPr-signal or RGB-signal is 1080i-format: sync
signals will be V-770 and H-770-3 sync.
When the sync is separate (H and V), the sync of the source
must be selected.
The IO-4, IO-5 control-lines select the sync-inputs of the
HEF4052 (7102).
In the figure, these control-lines are named SYNC_SELECT_2
and SYNC_SELECT_1.
Via IO-6 line (TRISTATE_SYNC), the sync output can be put in
tri-state.
9.6.5
Control Function
The I/O expander, controlled by I
selections.
These selections can be made with the user interface.
Audio
Audio left and audio right are connected via the two cinches
and passed through the module.
9.7
Video: High-end Input Processor (HIP,
Diagram B2)
The HIP TDA932xH contains the following functions:
•
IF demodulation.
•
AFC signal generation, used to track drifting transmitters.
•
Sound carrier re-generation (SIF).
•
Sync acquisition, delivering H
9.7.1
Inputs
The HIP has various inputs:
•
Full matrix switch with:
–
Two CVBS inputs.
–
Two Y/C (or additional CVBS) inputs.
–
One CVBS front-end input.
CL 16532043_022.eps
080501
2
C, makes the different
, and V
.
A
A
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