Racal Instruments 9901 Maintenance Manual page 46

Universal counter-timer
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Dal-g
Lal-ch/Unlafch
4.8
This
Is
del-ermlned
by
the
logic level
applied
to
IC2/4,
os
follows:-
Lotch
logic
'1
'
Unlatch
logic
'O'
4.9
In
Totalize
and
in
both
Time
Interval
modes
the
data
stores
in
IC2
are
unlatched by
a
logic
'O'
at
IC2/4.
This
is
arranged by Function switch
SI
which
applies
an
earth
to
R55
when
the
FREQ., PERIOD
and
RATIO
buttons are not selected,
this
'O'
is
then fed
through
inverters
IClSc and IC13b
to
IC2/4..
Normal/Hold and
Reset
4.10
The
NORMAL/HOLD
switch
1S7
is
mounted on
the Display
Assembly and shown on
the
right
hand
side of the circuit
diagram
(Fig. 4).
In
the
NORMAL
position the
display
is
continuously updated, the
automatic
reset
being produced
within the
CDI
Chip.
4.11
The
HOLD
connection
to the
CDI Chip
is
at
IC2/13,
the logic
requirements
at
this
point are:-
(
Hold
'!'
IC2/13
(
Free
Run
'O'
(
Reset.,
Transition
'!'
to
'O'
The Hold and manual
Reset
signals
are
applied
via the display
time generator
and
associated
circuit
described
in
paras.
4.39 and
4.40.
'A'
CHANNEL
INPUT
Introduction
4.12
The
'A'
channel
has alternative amplifier paths,
selected
by
the
AC/DC
switch
ISl
.
The two
amplifier paths
have
a
common
output stage
(Q8) which
feeds into
the counter of the
CDI
Chip
at
IC2/22.
'A'
Channel
AC
Amplifier
4.13
Signals
in
the
range 10
Hz
to
50
MHz
which
are applied
to the 'A'
input socket are
fed via the
AC/DC
switch
(AC
position)
and
capacitor
ICl to the
SENSITIVITY
potentiometer
IRl
.
From
IRl the signal
is
fed via a coaxial lead to the
a.c.
amplifier
on
the
main p.c.b.
4-3
9901
Vol.2

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