Control Sequence; Control Sequence Diagram - Racal Instruments 9901 Maintenance Manual

Universal counter-timer
Table of Contents

Advertisement

CONTROL
SEQUENCE
3.
16
Figure
3.7 shows
the control
sequence diagrammatical
ly
(not to scale).
The
longer display time
shown
in
the
diagram
applies
to
the latched
modes
(Frequency,
Period
and
Ratio).
DISPLAY TIMES
HOLD
TIME
J
I
'
H
I
I
MAIN GATE
(INTERNAL)
GATE
OPEN
1
l'O'X'*,
1
1
It
,
i'
1
1
^
^
1
11
SO
5»is
DATA UPDATE
(INTERNAL)
RESET
(INTERNAL)
'
I
I
1
^100
ps
***
Control
Sequence Diagram
Fig.
3.7
External
Hold
3.17
If,
when
used with external
circuitry,
it
is
required
to
extend
the
cycle
time,
the external hold
signal (logic
'0')
at
pin
6 of
the data connector,
must be
applied before
the
end
of the gate or hold time.
To allow
a
new
measurement
cycle
to
commence,
the external
hold
input
must
go
'high' for
not
less
than
200
ps.
External Reset
3.18
External
reset
is
achieved by
the application of logic
'O'
to
pin
7
of the
connector
for
a period of
not
less
than 5
ms;
on
reverting
to
'1'
level
this
will reset
the dis-
play
to
'all
zeros'
and
initiate
a
new
measurement
cycle.
3-8
9901 Vol. 2

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents