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Yamaha Mio Service Manual

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Table of Contents

   Summary of Contents for Yamaha Mio

  • Page 2: Table Of Contents

    Table of Contents Schematic Diagram DRAM Circuits Ports & Connectors SCSI and Parallel Interface Circuits Serial Interface Circuits ROM Circuits Component Placement Diagram Parts List Integrated Circuit and Logic Data 74LS20 U2, U12, U24 74LS175 U3. U4 74LS138 7407 6551 ACIA U7, U10 74LS04 74LS02...
  • Page 3 MIO Service Manual Page 2...
  • Page 4 MIO Service Manual Page 3...
  • Page 5 MIO Service Manual Page 4...
  • Page 6 MIO Service Manual Page 5...
  • Page 7 MIO Service Manual Page 6...
  • Page 8 MIO Service Manual Page 7...
  • Page 9 1 VR2 512-MC78L15ACP $0.26 Variable Capacitor (obsolete- replaced with two 68pF caps) 1 CV1 659-GKG30015 $0.21 Inductor, Ceramic 27uH, 10% 2 L1,L2 M8030-ND $0.52 50 conductor Card-edge crimp connector used to make MIO-ATARI cable CCE50G-ND $4.79 MIO Service Manual Page 8...
  • Page 10: Ls20

    74LS20 DUAL 4-INPUT NAND GATE MIO Service Manual Page 9...
  • Page 11: Ls175

    U2, U12, U24 74LS175 QUAD D FLIP-FLOP MIO Service Manual Page 10...
  • Page 12 MIO Service Manual Page 11...
  • Page 13: Ls138

    U3, U4 74LS138 3-TO-8 LINE DECODER MIO Service Manual Page 12...
  • Page 14 MIO Service Manual Page 13...
  • Page 15 7407 HEX BUFFER/DRIVER MIO Service Manual Page 14...
  • Page 16: Acia

    6551 ASYNCHRONOUS COMMUNICATION INTERFACE ADAPTER (ACIA) MIO Service Manual Page 15...
  • Page 17 MIO Service Manual Page 16...
  • Page 18 MIO Service Manual Page 17...
  • Page 19 MIO Service Manual Page 18...
  • Page 20 MIO Service Manual Page 19...
  • Page 21 MIO Service Manual Page 20...
  • Page 22 MIO Service Manual Page 21...
  • Page 23: Ls04

    U7, U10 74LS04 HEX INVERTER MIO Service Manual Page 22...
  • Page 24: Ls02

    74LS02 QUAD 2-INPUT NOR GATE MIO Service Manual Page 23...
  • Page 25: Ls93

    U9, U25 74LS93 4-BIT BINARY COUNTER MIO Service Manual Page 24...
  • Page 26 MIO Service Manual Page 25...
  • Page 27 MIO Service Manual Page 26...
  • Page 28: Ls10

    74LS10 TRIPLE 3-INPUT NAND GATE MIO Service Manual Page 27...
  • Page 29: Ls00

    U13, U21, U67, U69 74LS00 QUAD 2-INPUT NAND GATE MIO Service Manual Page 28...
  • Page 30: Ls244

    U14, U26, U29, U49, U68 74LS244 OCTAL BUFFER/LINE DRIVER WITH TRI-STATE OUTPUTS MIO Service Manual Page 29...
  • Page 31 27C128 16K x 8 EPROM MIO Service Manual Page 30...
  • Page 32: Ls73a

    U16, U20 74LS73A DUAL J-K FLIP-FLOP WITH CLEAR MIO Service Manual Page 31...
  • Page 33 MIO Service Manual Page 32...
  • Page 34 MIO Service Manual Page 33...
  • Page 35: Mc1489p

    MC1489P QUAD LINE RECIEVER MIO Service Manual Page 34...
  • Page 36: Lm3086

    LM3086 TRANSISTOR ARRAY MIO Service Manual Page 35...
  • Page 37: Hc4046

    74HC4046 PHASE LOCKED LOOP MIO Service Manual Page 36...
  • Page 38 MIO Service Manual Page 37...
  • Page 39 MIO Service Manual Page 38...
  • Page 40 MIO Service Manual Page 39...
  • Page 41 MIO Service Manual Page 40...
  • Page 42 MIO Service Manual Page 41...
  • Page 43 MIO Service Manual Page 42...
  • Page 44: Ls139

    74LS139 DUAL 1-OF-4 DECODER/DEMULTIPLEXER MIO Service Manual Page 43...
  • Page 45 MIO Service Manual Page 44...
  • Page 46: Ls158

    74LS158 QUAD 2-INPUT MULTIPLEXER MIO Service Manual Page 45...
  • Page 47 MIO Service Manual Page 46...
  • Page 48: Ls374

    U27, U48 74LS374 OCTAL D-TYPE FLIP-FLOP; POSITIVE EDGE TRIGGER; TRI-STATE MIO Service Manual Page 47...
  • Page 49 MIO Service Manual Page 48...
  • Page 50: Ls240

    74LS240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS MIO Service Manual Page 49...
  • Page 51: Resistor Networks

    U47 MDP1603-330G U50 MDP1605 221/331G DIP PACKAGE RESISTOR NETWORKS MIO Service Manual Page 50...
  • Page 52 MIO Service Manual Page 51...
  • Page 53 MIO Service Manual Page 52...
  • Page 54 MIO Service Manual Page 53...
  • Page 55 MIO Service Manual Page 54...
  • Page 56 MIO Service Manual Page 55...
  • Page 57 MIO Service Manual Page 56...
  • Page 58 MIO Service Manual Page 57...
  • Page 59 The MIO has 3 basic addressing areas: 1) ACIA at $D1C0-$D1DF, 2) MIO Latches at $D1E0- $D1FF, and 3) 256 bytes of RAM at $D600-$D6FF. Note that the ACIA and MIO latches are not fully decoded; both contain 4 read/write registers, but each register has 7 shadows. Tables 5-1 through 5- 3 briefly describes the MIO registers.
  • Page 60 $D1FF B[4] 1 = R:/P: Handler ROM B[3] = Printer BUSY- IRQ B[5] 1 = Seg 1 of setup MENU B[4] = MIO IRQ (from 6551 or All bits 0 disable the ROM. Printer BUSY- IRQ) $D1C0 Write ACIA transmit register.
  • Page 61 Data Terminal Ready (DTR) Data terminal not ready (DTR false)*. Data terminal ready (DTR true). Note * The transmitter is disabled immediately. The receiver is disabled but will first complete receiving the byte in process. MIO Service Manual Page 60...
  • Page 62 Bits 3-0 Selected Baud Rate (SBR) 3 2 1 0 Baud Rate 0 0 0 0 16 x RxC (Not usable by MIO). 0 0 0 1 50 0 0 1 0 75 0 0 1 1 110 0 1 0 0 135...
  • Page 63 7 of $D1E2 is set ('1') and the printer BUSY is false ('0'). Bit 4 of $D1E3 is the general IRQ flag from the MIO (a 1 indicates that IRQ- is true). If bit 3 is also set, then the IRQ- is caused by the printer.
  • Page 64 Software Description In order for the MIO to perform its multitude of tasks, one full page of memory has been allocated for general operating variables and configuration parameters. Two other pages have been reserved for "R:" handler input and output buffers, and the rest of memory (up to 4093 pages) can be used as RAM drives and a printer buffer through the MIO ROM.
  • Page 65 +0: Number cylinders on drive (MSB,LSB) +2: Numer heads on hard drive +3: Cylinder to start reduced write current +5: Precompensation value (usually 0) +7: ECC burst length (usually $0B) Table 5-5. MIO Operating Variables Address Symbol Length Function of operating variable...
  • Page 66 (via the DOS PRINT command and batch files). All the syntaxes use just "R:" for the device name since there is only one RS-232 port on the MIO. In fact, if you do use a port number (ex. "R2:"), it is simply ignored and treated the same as "R:".
  • Page 67 STATUS command. If there were an error (DUMMY<>1), then BASIC would halt and give an error message (unless a TRAP was performed prior to the STATUS). The block mode STATUS (first syntax) returns a status history of the port (in FLAGS) and the state MIO Service Manual Page 66...
  • Page 68 Dec Equiv Meaning When Bit is Set (1) DSR is true (ready) CTS is true (ready — Always true on MIO) CRX is true (ready) RCV is at MARK (Always Set on MIO) * Bits 6, 4, and 2 are simply copies of the next highest bit. In the 850 Interface, these bits would indicate a history (i.e.
  • Page 69 (0 or 128) for the desired number of stop bits per word. Note that the word size is always 8 bits plus 1 or 2 stop bits; the MIO "R:" handler does not support smaller word sizes as did the Atari 850 interface.
  • Page 70 "block mode", the statement returns the state of the handshake lines. This has no effect on the rest of the "R:" handler functioning or on the ACIA. It simply set a flag for the STATUS function. MIO Service Manual Page 69...
  • Page 71 4 - DTR 1 - CRX 3 - XMT 2 - RCV 5 - GND 6 - DSR 7 - RTS 8 - CTS ¶ Frame — to the No connection to shield ¶ shield wire MIO Service Manual Page 70...
  • Page 72 All handshaking lines are connected even though most applications would work with only XMT, RCV, and GND. The Toshiba printer is a DTE device and the MIO is also a DTE device. This requires the crossing of XMT and RCV. Be sure to check your printer manual for pin out as most printer connectors will vary.
  • Page 73 Beta xxx SCSI (cartridge drive xxMb) Rodime RO650 SCSI (includes drive 10Mb) RO652 SCSI (includes drive 20Mb) Seagate ST225N SCSI (includes drive 20Mb) Western Digital WD1002-SHD SASI ST506/412 XEBEC 1410 SASI ST506/412 1410A SASI ST506/412 MIO Service Manual Page 72...

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