ABB REU 610 Technical Reference Manual page 23

Voltage relay
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1MRS755769
Voltage Relay
Technical Reference Manual
The high- set overvoltage stage U>> can be set to be based on either
Conventional voltage measurement ( U>> mode selected) , or
*
Calculated negative phase- sequence voltage ( U
*
The selection between these modes is made either by using H M I or parameter
S7 , the default setting being conventional measurement. S tage U
U
> ( N PS ) cannot be used at the same time.
2
S tage U>> can be set out of operation in S GF 3 / 1. This state is indicated by
dashes on the L CD
and by "9 9 9 " when the set start value is read via serial
communication.
It is possible to block the tripping of an overvoltage stage by
applying a digital input signal to the relay.
O v er v oltage p r otec ti on
m eas u r em en t
Both the low- set and the high- set overvoltage stage can independently be set
to start and trip when one of the three voltages or all the voltages rise above
the set start value. By default, both stages operate when one of the three
voltages rise above the set start value. The selection is made in S GF 4 / 5 and
S GF 4 / 6.
W hen the phase- to- phase voltage values ex ceed the set start value of the low-
set stage, U>, the stage generates a start signal after a ~ 60 ms' start time.
W hen the set operate time at definite- time characteristic or the calculated
operate time at ID M T characteristic elapses, the stage generates a trip signal.
S tage U> has a settable resetting time ( both at definite- time and ID M T
characteristics) , t
>, for reset coordination with ex isting electromechanical
r
relays or for reducing fault clearance times of recurring, transient faults. If
stage U> has started and the phase- to- phase voltages fall below the set start
value of the stage, the start of the stage remains active for the set resetting
time. If the phase- to- phase voltages ex ceed the set start value again while the
timer is running, the timer is cleared and the start of the stage remains active.
Consequently, the set resetting time ensures that when the stage starts because
of voltage spikes, it is not immediately reset. If stage U> has already tripped,
the stage is reset in 7 0 ms after the phase- to- phase voltages have fallen below
0.5 times the set start value of the stage. H owever, if stage U> has already
tripped and the phase- to- phase voltages have fallen below the set start value
of the stage, but not below 0.5 times the set start value, the stage is reset when
the set resetting time is ex pired.
W hen the conventional protection mode is selected and the phase- to- phase
voltages ex ceed the set start value of the high- set stage, U>>, the stage
generates a start signal after a ~ 5 0 ms' start time. W hen the set operate time
> mode selected) .
2
b as ed
on
c on v en ti on al v oltage
REU 610
< ( PPS ) and
1
23

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