Onkyo TX-SR402 Service Manual page 37

IC BLOCK DIAGRAM AND TERMINAL DESCRIPTIONS-4
Q701:CS493264(DSP IC)-1
BLOCK DIAGRAM
RESET
CMPDAT,
SDATAN2
COMPRESSED
CMPCLK,
DATA INPUT
SCLKN2
INTERFACE
CMPREQ,
LRCLKN2
SCLKN1,
STCCLK2
DIGITAL
AUDIO
LRCLKN1
INPUT
INTERFACE
SDATAN1
CLKIN
CLOCK MANAGER
CLKSEL
FILT2 FILT1
PIN LAYOUT
DATA7,EMAD7,GPIO7
DATA6,EMAD6,GPIO6
DATA5,EMAD5,GPIO5
DATA4,EMAD4,GPIO4
DATA3,EMAD3,GPIO3
DATA2,EMAD2,GPIO2
DATA1,EMAD1,GPIO1
DATA0,EMAD0,GPIO0
RD, WR,
DATA7:0, R/W, DS,
EMAD7:0, EMOE, EMWR,
CS
GPIO7:0 GPIO11 GPIO10
PARALLEL or SERIAL HOST INTERFACE
FRAMER
SHIFTER
DSP PROCESSING
INPUT
BUFFER
CONTROLLER
RAM
PROGRAM
MEMORY
RAM INPUT
BUFFER
ROM
PROGRAM
MEMORY
PLL
VA AGND DGND(3:1)
7
A0,SCCLK
8
9
10
11
VD2 12
13
DGND2
14
15
16
17
SCDIO,
SCDOUT,
A0, A1, ABOOT,
PSEL,
SCCLK SCDIN INTREQ
GPIO9
24-BIT
RAM
DATA
RAM
MEMORY
FORMATTER
OUTPUT
BUFFER
ROM
DATA
MEMORY
STC
VD(3:1)
AUDATA2
39
38 DC
DD
37
RESET
36
35 AGND
VA
34
FILT1
33
FILT2
32
31 CLKSEL
CLKIN
30
29 CMPREQ,LRCLKN2
TX-SR402/8240/HT-R420
EXTMEM,
GPIO8
DD
DC
MCLK
SCLK
LRCLK
OUTPUT
AUDATA[2.0]
XMT958/AUDATA3