Arithmetic Instructions - Siemens C500 User Manual

4.2.2

Arithmetic Instructions

The C500 family microcontrollers have four basic mathematical operations. Only 8-bit operations
using unsigned arithmetic are supported directly. The overflow flag, however, permits the addition
and subtraction operation to serve for both unsigned and signed binary integers. Arithmetic can also
be performed directly on packed BCD representations.
Addition
Ð INC (increment) adds one to the source operand and puts the result in the operand (flags in
PSW are not affected).
Ð ADD adds A to the source operand and returns the result to A.
Ð ADDC (add with carry) adds A and the source operand, then adds one (1) if CY is set, and
puts the result in A.
Ð DA (decimal-add-adjust for BCD addition) corrects the sum which results from the binary
addition of two-digit decimal operands. The packed decimal sum formed by DA is returned to
A. CY is set if the BCD result is greater than 99; otherwise, it is cleared.
Subtraction
Ð SUBB (subtract with borrow) subtracts the second source operand from the first operand (the
accumulator), subtracts one (1) if CY is set and returns the result to A.
Ð DEC (decrement) subtracts one (1) from the source operand and returns the result to the
operand (flags in PSW are not affected).
Multiplication
Ð MUL performs an unsigned multiplication of the A register by the B register, returning a double
byte result. A receives the low-order byte, B receives the high-order byte. OV is cleared if the
top half of the result is zero and is set if it is not zero. CY is cleared. AC is unaffected.
Division
Ð DIV performs an unsigned division of the A register by the B register; it returns the integer
quotient to the A register and returns the fractional remainder to the B register. Division by
zero leaves indeterminate data in registers A and B and sets OV; otherwise, OV is cleared.
CY is cleared. AC remains unaffected.
Flags
Unless otherwise stated in the previous descriptions, the flags of PSW are affected as follows:
Ð CY is set if the operation causes a carry to or a borrow from the resulting high-order bit;
otherwise CY is cleared.
Ð AC is set if the operation results in a carry from the low-order four bits of the result (during
addition), or a borrow from the high-order bits to the low-order bits (during subtraction);
otherwise AC is cleared.
Ð OV is set if the operation results in a carry to the high-order bit of the result but not a carry
from the bit, or vice versa; otherwise OV is cleared. OV is used in twoÕs-complement
arithmetic, because it is set when the signal result cannot be represented in 8 bits.
Ð P is set if the modulo-2 sum of the eight bits in the accumulator is 1 (odd parity); otherwise P
is cleared (even parity). When a value is written to the PSW register, the P bit remains
unchanged, as it always reflects the parity of A.
Semiconductor Group 4-4
Instruction Set
C500 Family
1998-04-01