Memory Organization; Program Memory; Data Memory - Siemens C500 User Manual

1.2

Memory Organization

The memory resources of the C500 family microcontrollers are organized in different types of
memories (data and program memory), which further can be located internally on the
microcontroller chip or outside of the microcontroller. The memory partitioning of the C500
microcontrollers is typical for a Harvard architecture where data and program areas are held in
separate memory areas. The on-chip peripheral units are accessed using an internal special
function register memory area.
The available memory areas have different sizes and are located in the following five address
spaces:
Table 1-1
C500 Address Spaces
Type of Memory

Program Memory

Data Memory

Special Function Register
1.2.1 Program Memory
The program memory of the C500 family microcontrollers can be composed of either completely
external program memory, of only internal program memory (on-chip ROM / EEPROM), or of a
mixture of internal and external program memory. lf the EA pin (EA= E xternal A ccess) is held at low
level, the C500 microcontrollers execute the program code always out of the external program
memory. Romless C500 derivatives can use this type of program memory only. C500 derivatives
with on-chip program memory typically use their internal program memory only. If the internal
program memory is used the EA pin must be put to high level. With EA high, the microcontroller
executes instructions internally unless the address exceeds the upper limit of the internal program
memory. If the program counter is set to an address (e.g. by a jump instruction) which is higher than
the internal program memory, instructions are executed out of an external program memory. When
the instruction address again is below the internal program memory size limit, internal program
memory is accessed again.
Figure 1-1 shows the typical C500 family microcontroller program memory configuration for the two
cases EA=0 and EA=1. The ROM boundary shown in figure 1-1 , applies to the C501 which has 8K
byte of internal ROM. Other C500 family microcontrollers with different ROM size have different
ROM boundaries.
Semiconductor Group
Location
External
Internal (ROM, EEPROM)
External
Internal XRAM
Internal
Internal
1-2
Fundamental Structure
C500 Family
Size
max. 64 KByte
Depending on C500 version
2K up to 64KByte
max. 64 KByte
Depending on C500 version
256 Byte up to 3 KByte
128 or 256 Byte
128/256 Bytes
1998-04-01